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{ "id": 16878, "url": "https://patchwork.libcamera.org/api/patches/16878/?format=api", "web_url": "https://patchwork.libcamera.org/patch/16878/", "project": { "id": 1, "url": "https://patchwork.libcamera.org/api/projects/1/?format=api", "name": "libcamera", "link_name": "libcamera", "list_id": "libcamera_core", "list_email": "libcamera-devel@lists.libcamera.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20220801000543.3501-2-laurent.pinchart@ideasonboard.com>", "date": "2022-08-01T00:05:31", "name": "[libcamera-devel,01/13] include: linux: Update kernel headers to version v5.19", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "b571c3fb575624e999f7f592616d15f22b0abe02", "submitter": { "id": 2, "url": "https://patchwork.libcamera.org/api/people/2/?format=api", "name": "Laurent Pinchart", "email": "laurent.pinchart@ideasonboard.com" }, "delegate": null, "mbox": "https://patchwork.libcamera.org/patch/16878/mbox/", "series": [ { "id": 3352, "url": "https://patchwork.libcamera.org/api/series/3352/?format=api", "web_url": "https://patchwork.libcamera.org/project/libcamera/list/?series=3352", "date": "2022-08-01T00:05:30", "name": "libcamera: pipeline: simple: Support the NXP i.MX8 ISI", "version": 1, "mbox": "https://patchwork.libcamera.org/series/3352/mbox/" } ], "comments": "https://patchwork.libcamera.org/api/patches/16878/comments/", "check": "pending", "checks": "https://patchwork.libcamera.org/api/patches/16878/checks/", "tags": {}, "headers": { "Return-Path": "<libcamera-devel-bounces@lists.libcamera.org>", "X-Original-To": "parsemail@patchwork.libcamera.org", "Delivered-To": "parsemail@patchwork.libcamera.org", "Received": [ "from lancelot.ideasonboard.com (lancelot.ideasonboard.com\n\t[92.243.16.209])\n\tby patchwork.libcamera.org (Postfix) with ESMTPS id 1973DBE173\n\tfor <parsemail@patchwork.libcamera.org>;\n\tMon, 1 Aug 2022 00:05:53 +0000 (UTC)", "from lancelot.ideasonboard.com (localhost [IPv6:::1])\n\tby lancelot.ideasonboard.com (Postfix) with ESMTP id 8776C6330F;\n\tMon, 1 Aug 2022 02:05:52 +0200 (CEST)", "from perceval.ideasonboard.com (perceval.ideasonboard.com\n\t[213.167.242.64])\n\tby lancelot.ideasonboard.com (Postfix) with ESMTPS id 578CB6330D\n\tfor <libcamera-devel@lists.libcamera.org>;\n\tMon, 1 Aug 2022 02:05:50 +0200 (CEST)", "from pendragon.ideasonboard.com (62-78-145-57.bb.dnainternet.fi\n\t[62.78.145.57])\n\tby perceval.ideasonboard.com (Postfix) with ESMTPSA id D68FF30B\n\tfor <libcamera-devel@lists.libcamera.org>;\n\tMon, 1 Aug 2022 02:05:49 +0200 (CEST)" ], "DKIM-Signature": [ "v=1; a=rsa-sha256; c=relaxed/simple; d=libcamera.org;\n\ts=mail; t=1659312352;\n\tbh=eehs1aPisys8g/uv8FGQ+KUzsyozOfF11e+CVKVcwvg=;\n\th=To:Date:In-Reply-To:References:Subject:List-Id:List-Unsubscribe:\n\tList-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:\n\tFrom;\n\tb=lj7uKoPrAyP/Cdub1fhvNOfyDb6LtiVkciQn9D1QQlYXfPWJ+Xfyw1WxNtcGaeKu1\n\tx5+7lyP/NpCI9xKx42sMVF4Zdn/IcJONQVvjQWmKyr8Wbc3gct1zOJcEDRXVceYtZr\n\tPvfOnM0KwOfae/rHeeWldjdIWj5jXmr8hBdH6pLkC2rPtkHOD9HVkC0MRLp0nwypgG\n\tPGYIHblQgjOJNZBqnPZHAaLrdYOhgig3Ms6+pRmzz9zPzl82fKGR4XPNdFb9nO0ODN\n\tKk0+xr9J/gZrusJKsbNmQhlmII+L5Ota+wf18/gBntn4Q0lC3AIDJJ9/4/mAQO7KrD\n\t786ggY1Y8YkoQ==", "v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com;\n\ts=mail; t=1659312350;\n\tbh=eehs1aPisys8g/uv8FGQ+KUzsyozOfF11e+CVKVcwvg=;\n\th=From:To:Subject:Date:In-Reply-To:References:From;\n\tb=pIq5Lkp+4o0D4UIxg3oLLfJD0ay/AnkVfhejntR73Jcd+7wxa5xSDZC0ii7PoEweh\n\t+xjS++82C1owXlIaXqw3KyeHj8MrjlWy1WKfcHTylaJjtWJZjx7PsKvYSCHLphhSay\n\tZi3VaLKQdCuMGF8KZv2Gqy+3lKhjk8t+o7h01t/4=" ], "Authentication-Results": "lancelot.ideasonboard.com; dkim=pass (1024-bit key; \n\tunprotected) header.d=ideasonboard.com\n\theader.i=@ideasonboard.com\n\theader.b=\"pIq5Lkp+\"; dkim-atps=neutral", "To": "libcamera-devel@lists.libcamera.org", "Date": "Mon, 1 Aug 2022 03:05:31 +0300", "Message-Id": "<20220801000543.3501-2-laurent.pinchart@ideasonboard.com>", "X-Mailer": "git-send-email 2.35.1", "In-Reply-To": "<20220801000543.3501-1-laurent.pinchart@ideasonboard.com>", "References": "<20220801000543.3501-1-laurent.pinchart@ideasonboard.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[libcamera-devel] [PATCH 01/13] include: linux: Update kernel\n\theaders to version v5.19", "X-BeenThere": "libcamera-devel@lists.libcamera.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "<libcamera-devel.lists.libcamera.org>", "List-Unsubscribe": "<https://lists.libcamera.org/options/libcamera-devel>,\n\t<mailto:libcamera-devel-request@lists.libcamera.org?subject=unsubscribe>", "List-Archive": "<https://lists.libcamera.org/pipermail/libcamera-devel/>", "List-Post": "<mailto:libcamera-devel@lists.libcamera.org>", "List-Help": "<mailto:libcamera-devel-request@lists.libcamera.org?subject=help>", "List-Subscribe": "<https://lists.libcamera.org/listinfo/libcamera-devel>,\n\t<mailto:libcamera-devel-request@lists.libcamera.org?subject=subscribe>", "From": "Laurent Pinchart via libcamera-devel\n\t<libcamera-devel@lists.libcamera.org>", "Reply-To": "Laurent Pinchart <laurent.pinchart@ideasonboard.com>", "Errors-To": "libcamera-devel-bounces@lists.libcamera.org", "Sender": "\"libcamera-devel\" <libcamera-devel-bounces@lists.libcamera.org>" }, "content": "Update kernel headers to v5.19 using utils/update-kernel-headers.sh and\nre-instating libcamera local modifications.\n\nSigned-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>\n---\n include/linux/README | 2 +-\n include/linux/dma-buf.h | 4 +-\n include/linux/drm_fourcc.h | 86 +++++++++-\n include/linux/intel-ipu3.h | 35 ++--\n include/linux/v4l2-controls.h | 301 +++++++++++++++++++++++++++++++++-\n include/linux/videodev2.h | 13 +-\n 6 files changed, 418 insertions(+), 23 deletions(-)", "diff": "diff --git a/include/linux/README b/include/linux/README\nindex 4e314b9820ce..9f61517a119a 100644\n--- a/include/linux/README\n+++ b/include/linux/README\n@@ -1,4 +1,4 @@\n # SPDX-License-Identifier: CC0-1.0\n \n-Files in this directory are imported from v5.16-rc7 of the Linux kernel. Do not\n+Files in this directory are imported from v5.19 of the Linux kernel. Do not\n modify them manually.\ndiff --git a/include/linux/dma-buf.h b/include/linux/dma-buf.h\nindex 8e4a2ca0bcbf..b1523cb8ab30 100644\n--- a/include/linux/dma-buf.h\n+++ b/include/linux/dma-buf.h\n@@ -92,7 +92,7 @@ struct dma_buf_sync {\n * between them in actual uapi, they're just different numbers.\n */\n #define DMA_BUF_SET_NAME\t_IOW(DMA_BUF_BASE, 1, const char *)\n-#define DMA_BUF_SET_NAME_A\t_IOW(DMA_BUF_BASE, 1, u32)\n-#define DMA_BUF_SET_NAME_B\t_IOW(DMA_BUF_BASE, 1, u64)\n+#define DMA_BUF_SET_NAME_A\t_IOW(DMA_BUF_BASE, 1, __u32)\n+#define DMA_BUF_SET_NAME_B\t_IOW(DMA_BUF_BASE, 1, __u64)\n \n #endif\ndiff --git a/include/linux/drm_fourcc.h b/include/linux/drm_fourcc.h\nindex ea11dcb405e5..cc69eecc606f 100644\n--- a/include/linux/drm_fourcc.h\n+++ b/include/linux/drm_fourcc.h\n@@ -314,6 +314,13 @@ extern \"C\" {\n */\n #define DRM_FORMAT_P016\t\tfourcc_code('P', '0', '1', '6') /* 2x2 subsampled Cr:Cb plane 16 bits per channel */\n \n+/* 2 plane YCbCr420.\n+ * 3 10 bit components and 2 padding bits packed into 4 bytes.\n+ * index 0 = Y plane, [31:0] x:Y2:Y1:Y0 2:10:10:10 little endian\n+ * index 1 = Cr:Cb plane, [63:0] x:Cr2:Cb2:Cr1:x:Cb1:Cr0:Cb0 [2:10:10:10:2:10:10:10] little endian\n+ */\n+#define DRM_FORMAT_P030\t\tfourcc_code('P', '0', '3', '0') /* 2x2 subsampled Cr:Cb plane 10 bits per channel packed */\n+\n /* 3 plane non-subsampled (444) YCbCr\n * 16 bits per component, but only 10 bits are used and 6 bits are padded\n * index 0: Y plane, [15:0] Y:x [10:6] little endian\n@@ -630,6 +637,53 @@ extern \"C\" {\n */\n #define I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC fourcc_mod_code(INTEL, 8)\n \n+/*\n+ * Intel Tile 4 layout\n+ *\n+ * This is a tiled layout using 4KB tiles in a row-major layout. It has the same\n+ * shape as Tile Y at two granularities: 4KB (128B x 32) and 64B (16B x 4). It\n+ * only differs from Tile Y at the 256B granularity in between. At this\n+ * granularity, Tile Y has a shape of 16B x 32 rows, but this tiling has a shape\n+ * of 64B x 8 rows.\n+ */\n+#define I915_FORMAT_MOD_4_TILED fourcc_mod_code(INTEL, 9)\n+\n+/*\n+ * Intel color control surfaces (CCS) for DG2 render compression.\n+ *\n+ * The main surface is Tile 4 and at plane index 0. The CCS data is stored\n+ * outside of the GEM object in a reserved memory area dedicated for the\n+ * storage of the CCS data for all RC/RC_CC/MC compressible GEM objects. The\n+ * main surface pitch is required to be a multiple of four Tile 4 widths.\n+ */\n+#define I915_FORMAT_MOD_4_TILED_DG2_RC_CCS fourcc_mod_code(INTEL, 10)\n+\n+/*\n+ * Intel color control surfaces (CCS) for DG2 media compression.\n+ *\n+ * The main surface is Tile 4 and at plane index 0. For semi-planar formats\n+ * like NV12, the Y and UV planes are Tile 4 and are located at plane indices\n+ * 0 and 1, respectively. The CCS for all planes are stored outside of the\n+ * GEM object in a reserved memory area dedicated for the storage of the\n+ * CCS data for all RC/RC_CC/MC compressible GEM objects. The main surface\n+ * pitch is required to be a multiple of four Tile 4 widths.\n+ */\n+#define I915_FORMAT_MOD_4_TILED_DG2_MC_CCS fourcc_mod_code(INTEL, 11)\n+\n+/*\n+ * Intel Color Control Surface with Clear Color (CCS) for DG2 render compression.\n+ *\n+ * The main surface is Tile 4 and at plane index 0. The CCS data is stored\n+ * outside of the GEM object in a reserved memory area dedicated for the\n+ * storage of the CCS data for all RC/RC_CC/MC compressible GEM objects. The\n+ * main surface pitch is required to be a multiple of four Tile 4 widths. The\n+ * clear color is stored at plane index 1 and the pitch should be ignored. The\n+ * format of the 256 bits of clear color data matches the one used for the\n+ * I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC modifier, see its description\n+ * for details.\n+ */\n+#define I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC fourcc_mod_code(INTEL, 12)\n+\n /*\n * IPU3 Bayer packing layout\n *\n@@ -638,7 +692,7 @@ extern \"C\" {\n * the 6 most significant bits in the last byte unused. The format is little\n * endian.\n */\n-#define IPU3_FORMAT_MOD_PACKED fourcc_mod_code(INTEL, 9)\n+#define IPU3_FORMAT_MOD_PACKED fourcc_mod_code(INTEL, 13)\n \n /*\n * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks\n@@ -677,6 +731,28 @@ extern \"C\" {\n */\n #define DRM_FORMAT_MOD_QCOM_COMPRESSED\tfourcc_mod_code(QCOM, 1)\n \n+/*\n+ * Qualcomm Tiled Format\n+ *\n+ * Similar to DRM_FORMAT_MOD_QCOM_COMPRESSED but not compressed.\n+ * Implementation may be platform and base-format specific.\n+ *\n+ * Each macrotile consists of m x n (mostly 4 x 4) tiles.\n+ * Pixel data pitch/stride is aligned with macrotile width.\n+ * Pixel data height is aligned with macrotile height.\n+ * Entire pixel data buffer is aligned with 4k(bytes).\n+ */\n+#define DRM_FORMAT_MOD_QCOM_TILED3\tfourcc_mod_code(QCOM, 3)\n+\n+/*\n+ * Qualcomm Alternate Tiled Format\n+ *\n+ * Alternate tiled format typically only used within GMEM.\n+ * Implementation may be platform and base-format specific.\n+ */\n+#define DRM_FORMAT_MOD_QCOM_TILED2\tfourcc_mod_code(QCOM, 2)\n+\n+\n /* Vivante framebuffer modifiers */\n \n /*\n@@ -929,6 +1005,10 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)\n * and UV. Some SAND-using hardware stores UV in a separate tiled\n * image from Y to reduce the column height, which is not supported\n * with these modifiers.\n+ *\n+ * The DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT modifier is also\n+ * supported for DRM_FORMAT_P030 where the columns remain as 128 bytes\n+ * wide, but as this is a 10 bpp format that translates to 96 pixels.\n */\n \n #define DRM_FORMAT_MOD_BROADCOM_SAND32_COL_HEIGHT(v) \\\n@@ -1439,11 +1519,11 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)\n #define AMD_FMT_MOD_PIPE_MASK 0x7\n \n #define AMD_FMT_MOD_SET(field, value) \\\n-\t((uint64_t)(value) << AMD_FMT_MOD_##field##_SHIFT)\n+\t((__u64)(value) << AMD_FMT_MOD_##field##_SHIFT)\n #define AMD_FMT_MOD_GET(field, value) \\\n \t(((value) >> AMD_FMT_MOD_##field##_SHIFT) & AMD_FMT_MOD_##field##_MASK)\n #define AMD_FMT_MOD_CLEAR(field) \\\n-\t(~((uint64_t)AMD_FMT_MOD_##field##_MASK << AMD_FMT_MOD_##field##_SHIFT))\n+\t(~((__u64)AMD_FMT_MOD_##field##_MASK << AMD_FMT_MOD_##field##_SHIFT))\n \n /* Mobile Industry Processor Interface (MIPI) modifiers */\n \ndiff --git a/include/linux/intel-ipu3.h b/include/linux/intel-ipu3.h\nindex f30dce43d1d8..5c298ec557fa 100644\n--- a/include/linux/intel-ipu3.h\n+++ b/include/linux/intel-ipu3.h\n@@ -34,11 +34,17 @@\n * struct ipu3_uapi_grid_config - Grid plane config\n *\n * @width:\tGrid horizontal dimensions, in number of grid blocks(cells).\n+ *\t\tFor AWB, the range is (16, 80).\n+ *\t\tFor AF/AE, the range is (16, 32).\n * @height:\tGrid vertical dimensions, in number of grid cells.\n+ *\t\tFor AWB, the range is (16, 60).\n+ *\t\tFor AF/AE, the range is (16, 24).\n * @block_width_log2:\tLog2 of the width of each cell in pixels.\n- *\t\t\tfor (2^3, 2^4, 2^5, 2^6, 2^7), values [3, 7].\n+ *\t\t\tFor AWB, the range is [3, 6].\n+ *\t\t\tFor AF/AE, the range is [3, 7].\n * @block_height_log2:\tLog2 of the height of each cell in pixels.\n- *\t\t\tfor (2^3, 2^4, 2^5, 2^6, 2^7), values [3, 7].\n+ *\t\t\tFor AWB, the range is [3, 6].\n+ *\t\t\tFor AF/AE, the range is [3, 7].\n * @height_per_slice:\tThe number of blocks in vertical axis per slice.\n *\t\t\tDefault 2.\n * @x_start: X value of top left corner of Region of Interest(ROI).\n@@ -68,21 +74,21 @@ struct ipu3_uapi_grid_config {\n * @R_avg:\tRed average in the cell.\n * @B_avg:\tBlue average in the cell.\n * @Gb_avg:\tGreen average for blue lines in the cell.\n- * @sat_ratio:\tPercentage of pixels over a given threshold set in\n+ * @sat_ratio: Percentage of pixels over the thresholds specified in\n *\t\tipu3_uapi_awb_config_s, coded from 0 to 255.\n- * @padding0:\tUnused byte for padding.\n- * @padding1:\tUnused byte for padding.\n- * @padding2:\tUnused byte for padding.\n+ * @padding0: Unused byte for padding.\n+ * @padding1: Unused byte for padding.\n+ * @padding2: Unused byte for padding.\n */\n struct ipu3_uapi_awb_set_item {\n-\tunsigned char Gr_avg;\n-\tunsigned char R_avg;\n-\tunsigned char B_avg;\n-\tunsigned char Gb_avg;\n-\tunsigned char sat_ratio;\n-\tunsigned char padding0;\n-\tunsigned char padding1;\n-\tunsigned char padding2;\n+\t__u8 Gr_avg;\n+\t__u8 R_avg;\n+\t__u8 B_avg;\n+\t__u8 Gb_avg;\n+\t__u8 sat_ratio;\n+\t__u8 padding0;\n+\t__u8 padding1;\n+\t__u8 padding2;\n } __attribute__((packed));\n \n /*\n@@ -98,7 +104,6 @@ struct ipu3_uapi_awb_set_item {\n \t(IPU3_UAPI_AWB_MAX_SETS * \\\n \t (IPU3_UAPI_AWB_SET_SIZE + IPU3_UAPI_AWB_SPARE_FOR_BUBBLES))\n \n-\n /**\n * struct ipu3_uapi_awb_raw_buffer - AWB raw buffer\n *\ndiff --git a/include/linux/v4l2-controls.h b/include/linux/v4l2-controls.h\nindex a055d2576253..9d2a8237e712 100644\n--- a/include/linux/v4l2-controls.h\n+++ b/include/linux/v4l2-controls.h\n@@ -128,6 +128,7 @@ enum v4l2_colorfx {\n \tV4L2_COLORFX_SOLARIZATION\t\t= 13,\n \tV4L2_COLORFX_ANTIQUE\t\t\t= 14,\n \tV4L2_COLORFX_SET_CBCR\t\t\t= 15,\n+\tV4L2_COLORFX_SET_RGB\t\t\t= 16,\n };\n #define V4L2_CID_AUTOBRIGHTNESS\t\t\t(V4L2_CID_BASE+32)\n #define V4L2_CID_BAND_STOP_FILTER\t\t(V4L2_CID_BASE+33)\n@@ -145,9 +146,10 @@ enum v4l2_colorfx {\n \n #define V4L2_CID_ALPHA_COMPONENT\t\t(V4L2_CID_BASE+41)\n #define V4L2_CID_COLORFX_CBCR\t\t\t(V4L2_CID_BASE+42)\n+#define V4L2_CID_COLORFX_RGB\t\t\t(V4L2_CID_BASE+43)\n \n /* last CID + 1 */\n-#define V4L2_CID_LASTP1 (V4L2_CID_BASE+43)\n+#define V4L2_CID_LASTP1 (V4L2_CID_BASE+44)\n \n /* USER-class private control IDs */\n \n@@ -221,6 +223,12 @@ enum v4l2_colorfx {\n */\n #define V4L2_CID_USER_ALLEGRO_BASE\t\t(V4L2_CID_USER_BASE + 0x1170)\n \n+/*\n+ * The base for the isl7998x driver controls.\n+ * We reserve 16 controls for this driver.\n+ */\n+#define V4L2_CID_USER_ISL7998X_BASE\t\t(V4L2_CID_USER_BASE + 0x1180)\n+\n /* MPEG-class control IDs */\n /* The MPEG controls are applicable to all codec controls\n * and the 'MPEG' part of the define is historical */\n@@ -443,6 +451,11 @@ enum v4l2_mpeg_video_multi_slice_mode {\n #define V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES\t\t(V4L2_CID_CODEC_BASE+234)\n #define V4L2_CID_MPEG_VIDEO_DEC_CONCEAL_COLOR\t\t(V4L2_CID_CODEC_BASE+235)\n #define V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD\t(V4L2_CID_CODEC_BASE+236)\n+#define V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE\t(V4L2_CID_CODEC_BASE+237)\n+enum v4l2_mpeg_video_intra_refresh_period_type {\n+\tV4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM\t= 0,\n+\tV4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC\t= 1,\n+};\n \n /* CIDs for the MPEG-2 Part 2 (H.262) codec */\n #define V4L2_CID_MPEG_VIDEO_MPEG2_LEVEL\t\t\t(V4L2_CID_CODEC_BASE+270)\n@@ -1563,6 +1576,8 @@ struct v4l2_h264_dpb_entry {\n #define V4L2_H264_DECODE_PARAM_FLAG_IDR_PIC\t\t0x01\n #define V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC\t\t0x02\n #define V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD\t0x04\n+#define V4L2_H264_DECODE_PARAM_FLAG_PFRAME\t\t0x08\n+#define V4L2_H264_DECODE_PARAM_FLAG_BFRAME\t\t0x10\n \n #define V4L2_CID_STATELESS_H264_DECODE_PARAMS\t(V4L2_CID_CODEC_STATELESS_BASE + 7)\n /**\n@@ -2018,6 +2033,290 @@ struct v4l2_ctrl_hdr10_mastering_display {\n \t__u32 min_display_mastering_luminance;\n };\n \n+/* Stateless VP9 controls */\n+\n+#define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED\t0x1\n+#define\tV4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE\t0x2\n+\n+/**\n+ * struct v4l2_vp9_loop_filter - VP9 loop filter parameters\n+ *\n+ * @ref_deltas: contains the adjustment needed for the filter level based on the\n+ * chosen reference frame. If this syntax element is not present in the bitstream,\n+ * users should pass its last value.\n+ * @mode_deltas: contains the adjustment needed for the filter level based on the\n+ * chosen mode.\tIf this syntax element is not present in the bitstream, users should\n+ * pass its last value.\n+ * @level: indicates the loop filter strength.\n+ * @sharpness: indicates the sharpness level.\n+ * @flags: combination of V4L2_VP9_LOOP_FILTER_FLAG_{} flags.\n+ * @reserved: padding field. Should be zeroed by applications.\n+ *\n+ * This structure contains all loop filter related parameters. See sections\n+ * '7.2.8 Loop filter semantics' of the VP9 specification for more details.\n+ */\n+struct v4l2_vp9_loop_filter {\n+\t__s8 ref_deltas[4];\n+\t__s8 mode_deltas[2];\n+\t__u8 level;\n+\t__u8 sharpness;\n+\t__u8 flags;\n+\t__u8 reserved[7];\n+};\n+\n+/**\n+ * struct v4l2_vp9_quantization - VP9 quantization parameters\n+ *\n+ * @base_q_idx: indicates the base frame qindex.\n+ * @delta_q_y_dc: indicates the Y DC quantizer relative to base_q_idx.\n+ * @delta_q_uv_dc: indicates the UV DC quantizer relative to base_q_idx.\n+ * @delta_q_uv_ac: indicates the UV AC quantizer relative to base_q_idx.\n+ * @reserved: padding field. Should be zeroed by applications.\n+ *\n+ * Encodes the quantization parameters. See section '7.2.9 Quantization params\n+ * syntax' of the VP9 specification for more details.\n+ */\n+struct v4l2_vp9_quantization {\n+\t__u8 base_q_idx;\n+\t__s8 delta_q_y_dc;\n+\t__s8 delta_q_uv_dc;\n+\t__s8 delta_q_uv_ac;\n+\t__u8 reserved[4];\n+};\n+\n+#define V4L2_VP9_SEGMENTATION_FLAG_ENABLED\t\t0x01\n+#define V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP\t\t0x02\n+#define V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE\t0x04\n+#define V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA\t\t0x08\n+#define V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE\t0x10\n+\n+#define V4L2_VP9_SEG_LVL_ALT_Q\t\t\t\t0\n+#define V4L2_VP9_SEG_LVL_ALT_L\t\t\t\t1\n+#define V4L2_VP9_SEG_LVL_REF_FRAME\t\t\t2\n+#define V4L2_VP9_SEG_LVL_SKIP\t\t\t\t3\n+#define V4L2_VP9_SEG_LVL_MAX\t\t\t\t4\n+\n+#define V4L2_VP9_SEGMENT_FEATURE_ENABLED(id)\t(1 << (id))\n+#define V4L2_VP9_SEGMENT_FEATURE_ENABLED_MASK\t0xf\n+\n+/**\n+ * struct v4l2_vp9_segmentation - VP9 segmentation parameters\n+ *\n+ * @feature_data: data attached to each feature. Data entry is only valid if\n+ * the feature is enabled. The array shall be indexed with segment number as\n+ * the first dimension (0..7) and one of V4L2_VP9_SEG_{} as the second dimension.\n+ * @feature_enabled: bitmask defining which features are enabled in each segment.\n+ * The value for each segment is a combination of V4L2_VP9_SEGMENT_FEATURE_ENABLED(id)\n+ * values where id is one of V4L2_VP9_SEG_LVL_{}.\n+ * @tree_probs: specifies the probability values to be used when decoding a\n+ * Segment-ID. See '5.15. Segmentation map' section of the VP9 specification\n+ * for more details.\n+ * @pred_probs: specifies the probability values to be used when decoding a\n+ * Predicted-Segment-ID. See '6.4.14. Get segment id syntax' section of :ref:`vp9`\n+ * for more details.\n+ * @flags: combination of V4L2_VP9_SEGMENTATION_FLAG_{} flags.\n+ * @reserved: padding field. Should be zeroed by applications.\n+ *\n+ * Encodes the quantization parameters. See section '7.2.10 Segmentation params syntax' of\n+ * the VP9 specification for more details.\n+ */\n+struct v4l2_vp9_segmentation {\n+\t__s16 feature_data[8][4];\n+\t__u8 feature_enabled[8];\n+\t__u8 tree_probs[7];\n+\t__u8 pred_probs[3];\n+\t__u8 flags;\n+\t__u8 reserved[5];\n+};\n+\n+#define V4L2_VP9_FRAME_FLAG_KEY_FRAME\t\t\t0x001\n+#define V4L2_VP9_FRAME_FLAG_SHOW_FRAME\t\t\t0x002\n+#define V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT\t\t0x004\n+#define V4L2_VP9_FRAME_FLAG_INTRA_ONLY\t\t\t0x008\n+#define V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV\t\t0x010\n+#define V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX\t\t0x020\n+#define V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE\t\t0x040\n+#define V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING\t\t0x080\n+#define V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING\t\t0x100\n+#define V4L2_VP9_FRAME_FLAG_COLOR_RANGE_FULL_SWING\t0x200\n+\n+#define V4L2_VP9_SIGN_BIAS_LAST\t\t\t\t0x1\n+#define V4L2_VP9_SIGN_BIAS_GOLDEN\t\t\t0x2\n+#define V4L2_VP9_SIGN_BIAS_ALT\t\t\t\t0x4\n+\n+#define V4L2_VP9_RESET_FRAME_CTX_NONE\t\t\t0\n+#define V4L2_VP9_RESET_FRAME_CTX_SPEC\t\t\t1\n+#define V4L2_VP9_RESET_FRAME_CTX_ALL\t\t\t2\n+\n+#define V4L2_VP9_INTERP_FILTER_EIGHTTAP\t\t\t0\n+#define V4L2_VP9_INTERP_FILTER_EIGHTTAP_SMOOTH\t\t1\n+#define V4L2_VP9_INTERP_FILTER_EIGHTTAP_SHARP\t\t2\n+#define V4L2_VP9_INTERP_FILTER_BILINEAR\t\t\t3\n+#define V4L2_VP9_INTERP_FILTER_SWITCHABLE\t\t4\n+\n+#define V4L2_VP9_REFERENCE_MODE_SINGLE_REFERENCE\t0\n+#define V4L2_VP9_REFERENCE_MODE_COMPOUND_REFERENCE\t1\n+#define V4L2_VP9_REFERENCE_MODE_SELECT\t\t\t2\n+\n+#define V4L2_VP9_PROFILE_MAX\t\t\t\t3\n+\n+#define V4L2_CID_STATELESS_VP9_FRAME\t(V4L2_CID_CODEC_STATELESS_BASE + 300)\n+/**\n+ * struct v4l2_ctrl_vp9_frame - VP9 frame decoding control\n+ *\n+ * @lf: loop filter parameters. See &v4l2_vp9_loop_filter for more details.\n+ * @quant: quantization parameters. See &v4l2_vp9_quantization for more details.\n+ * @seg: segmentation parameters. See &v4l2_vp9_segmentation for more details.\n+ * @flags: combination of V4L2_VP9_FRAME_FLAG_{} flags.\n+ * @compressed_header_size: compressed header size in bytes.\n+ * @uncompressed_header_size: uncompressed header size in bytes.\n+ * @frame_width_minus_1: add 1 to it and you'll get the frame width expressed in pixels.\n+ * @frame_height_minus_1: add 1 to it and you'll get the frame height expressed in pixels.\n+ * @render_width_minus_1: add 1 to it and you'll get the expected render width expressed in\n+ * pixels. This is not used during the decoding process but might be used by HW scalers\n+ * to prepare a frame that's ready for scanout.\n+ * @render_height_minus_1: add 1 to it and you'll get the expected render height expressed in\n+ * pixels. This is not used during the decoding process but might be used by HW scalers\n+ * to prepare a frame that's ready for scanout.\n+ * @last_frame_ts: \"last\" reference buffer timestamp.\n+ * The timestamp refers to the timestamp field in struct v4l2_buffer.\n+ * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64.\n+ * @golden_frame_ts: \"golden\" reference buffer timestamp.\n+ * The timestamp refers to the timestamp field in struct v4l2_buffer.\n+ * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64.\n+ * @alt_frame_ts: \"alt\" reference buffer timestamp.\n+ * The timestamp refers to the timestamp field in struct v4l2_buffer.\n+ * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64.\n+ * @ref_frame_sign_bias: a bitfield specifying whether the sign bias is set for a given\n+ * reference frame. Either of V4L2_VP9_SIGN_BIAS_{}.\n+ * @reset_frame_context: specifies whether the frame context should be reset to default values.\n+ * Either of V4L2_VP9_RESET_FRAME_CTX_{}.\n+ * @frame_context_idx: frame context that should be used/updated.\n+ * @profile: VP9 profile. Can be 0, 1, 2 or 3.\n+ * @bit_depth: bits per components. Can be 8, 10 or 12. Note that not all profiles support\n+ * 10 and/or 12 bits depths.\n+ * @interpolation_filter: specifies the filter selection used for performing inter prediction.\n+ * Set to one of V4L2_VP9_INTERP_FILTER_{}.\n+ * @tile_cols_log2: specifies the base 2 logarithm of the width of each tile (where the width\n+ * is measured in units of 8x8 blocks). Shall be less than or equal to 6.\n+ * @tile_rows_log2: specifies the base 2 logarithm of the height of each tile (where the height\n+ * is measured in units of 8x8 blocks).\n+ * @reference_mode: specifies the type of inter prediction to be used.\n+ * Set to one of V4L2_VP9_REFERENCE_MODE_{}.\n+ * @reserved: padding field. Should be zeroed by applications.\n+ */\n+struct v4l2_ctrl_vp9_frame {\n+\tstruct v4l2_vp9_loop_filter lf;\n+\tstruct v4l2_vp9_quantization quant;\n+\tstruct v4l2_vp9_segmentation seg;\n+\t__u32 flags;\n+\t__u16 compressed_header_size;\n+\t__u16 uncompressed_header_size;\n+\t__u16 frame_width_minus_1;\n+\t__u16 frame_height_minus_1;\n+\t__u16 render_width_minus_1;\n+\t__u16 render_height_minus_1;\n+\t__u64 last_frame_ts;\n+\t__u64 golden_frame_ts;\n+\t__u64 alt_frame_ts;\n+\t__u8 ref_frame_sign_bias;\n+\t__u8 reset_frame_context;\n+\t__u8 frame_context_idx;\n+\t__u8 profile;\n+\t__u8 bit_depth;\n+\t__u8 interpolation_filter;\n+\t__u8 tile_cols_log2;\n+\t__u8 tile_rows_log2;\n+\t__u8 reference_mode;\n+\t__u8 reserved[7];\n+};\n+\n+#define V4L2_VP9_NUM_FRAME_CTX\t4\n+\n+/**\n+ * struct v4l2_vp9_mv_probs - VP9 Motion vector probability updates\n+ * @joint: motion vector joint probability updates.\n+ * @sign: motion vector sign probability updates.\n+ * @classes: motion vector class probability updates.\n+ * @class0_bit: motion vector class0 bit probability updates.\n+ * @bits: motion vector bits probability updates.\n+ * @class0_fr: motion vector class0 fractional bit probability updates.\n+ * @fr: motion vector fractional bit probability updates.\n+ * @class0_hp: motion vector class0 high precision fractional bit probability updates.\n+ * @hp: motion vector high precision fractional bit probability updates.\n+ *\n+ * This structure contains new values of motion vector probabilities.\n+ * A value of zero in an array element means there is no update of the relevant probability.\n+ * See `struct v4l2_vp9_prob_updates` for details.\n+ */\n+struct v4l2_vp9_mv_probs {\n+\t__u8 joint[3];\n+\t__u8 sign[2];\n+\t__u8 classes[2][10];\n+\t__u8 class0_bit[2];\n+\t__u8 bits[2][10];\n+\t__u8 class0_fr[2][2][3];\n+\t__u8 fr[2][3];\n+\t__u8 class0_hp[2];\n+\t__u8 hp[2];\n+};\n+\n+#define V4L2_CID_STATELESS_VP9_COMPRESSED_HDR\t(V4L2_CID_CODEC_STATELESS_BASE + 301)\n+\n+#define V4L2_VP9_TX_MODE_ONLY_4X4\t\t\t0\n+#define V4L2_VP9_TX_MODE_ALLOW_8X8\t\t\t1\n+#define V4L2_VP9_TX_MODE_ALLOW_16X16\t\t\t2\n+#define V4L2_VP9_TX_MODE_ALLOW_32X32\t\t\t3\n+#define V4L2_VP9_TX_MODE_SELECT\t\t\t\t4\n+\n+/**\n+ * struct v4l2_ctrl_vp9_compressed_hdr - VP9 probability updates control\n+ * @tx_mode: specifies the TX mode. Set to one of V4L2_VP9_TX_MODE_{}.\n+ * @tx8: TX 8x8 probability updates.\n+ * @tx16: TX 16x16 probability updates.\n+ * @tx32: TX 32x32 probability updates.\n+ * @coef: coefficient probability updates.\n+ * @skip: skip probability updates.\n+ * @inter_mode: inter mode probability updates.\n+ * @interp_filter: interpolation filter probability updates.\n+ * @is_inter: is inter-block probability updates.\n+ * @comp_mode: compound prediction mode probability updates.\n+ * @single_ref: single ref probability updates.\n+ * @comp_ref: compound ref probability updates.\n+ * @y_mode: Y prediction mode probability updates.\n+ * @uv_mode: UV prediction mode probability updates.\n+ * @partition: partition probability updates.\n+ * @mv: motion vector probability updates.\n+ *\n+ * This structure holds the probabilities update as parsed in the compressed\n+ * header (Spec 6.3). These values represent the value of probability update after\n+ * being translated with inv_map_table[] (see 6.3.5). A value of zero in an array element\n+ * means that there is no update of the relevant probability.\n+ *\n+ * This control is optional and needs to be used when dealing with the hardware which is\n+ * not capable of parsing the compressed header itself. Only drivers which need it will\n+ * implement it.\n+ */\n+struct v4l2_ctrl_vp9_compressed_hdr {\n+\t__u8 tx_mode;\n+\t__u8 tx8[2][1];\n+\t__u8 tx16[2][2];\n+\t__u8 tx32[2][3];\n+\t__u8 coef[4][2][2][6][6][3];\n+\t__u8 skip[3];\n+\t__u8 inter_mode[7][3];\n+\t__u8 interp_filter[4][2];\n+\t__u8 is_inter[4];\n+\t__u8 comp_mode[5];\n+\t__u8 single_ref[5][2];\n+\t__u8 comp_ref[5];\n+\t__u8 y_mode[4][9];\n+\t__u8 uv_mode[10][9];\n+\t__u8 partition[16][3];\n+\n+\tstruct v4l2_vp9_mv_probs mv;\n+};\n+\n /* MPEG-compression definitions kept for backwards compatibility */\n #define V4L2_CTRL_CLASS_MPEG V4L2_CTRL_CLASS_CODEC\n #define V4L2_CID_MPEG_CLASS V4L2_CID_CODEC_CLASS\ndiff --git a/include/linux/videodev2.h b/include/linux/videodev2.h\nindex dcc0b01dfa9a..6e3d58e5a5c4 100644\n--- a/include/linux/videodev2.h\n+++ b/include/linux/videodev2.h\n@@ -563,6 +563,7 @@ struct v4l2_pix_format {\n /* Grey bit-packed formats */\n #define V4L2_PIX_FMT_Y10BPACK v4l2_fourcc('Y', '1', '0', 'B') /* 10 Greyscale bit-packed */\n #define V4L2_PIX_FMT_Y10P v4l2_fourcc('Y', '1', '0', 'P') /* 10 Greyscale, MIPI RAW10 packed */\n+#define V4L2_PIX_FMT_IPU3_Y10\t\tv4l2_fourcc('i', 'p', '3', 'y') /* IPU3 packed 10-bit greyscale */\n \n /* Palette formats */\n #define V4L2_PIX_FMT_PAL8 v4l2_fourcc('P', 'A', 'L', '8') /* 8 8-bit palette */\n@@ -626,6 +627,8 @@ struct v4l2_pix_format {\n /* Tiled YUV formats, non contiguous planes */\n #define V4L2_PIX_FMT_NV12MT v4l2_fourcc('T', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 64x32 tiles */\n #define V4L2_PIX_FMT_NV12MT_16X16 v4l2_fourcc('V', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 16x16 tiles */\n+#define V4L2_PIX_FMT_NV12M_8L128 v4l2_fourcc('N', 'A', '1', '2') /* Y/CbCr 4:2:0 8x128 tiles */\n+#define V4L2_PIX_FMT_NV12M_10BE_8L128 v4l2_fourcc_be('N', 'T', '1', '2') /* Y/CbCr 4:2:0 10-bit 8x128 tiles */\n \n /* Bayer formats - see http://www.siliconimaging.com/RGB%20Bayer.htm */\n #define V4L2_PIX_FMT_SBGGR8 v4l2_fourcc('B', 'A', '8', '1') /* 8 BGBG.. GRGR.. */\n@@ -697,6 +700,7 @@ struct v4l2_pix_format {\n #define V4L2_PIX_FMT_VP8 v4l2_fourcc('V', 'P', '8', '0') /* VP8 */\n #define V4L2_PIX_FMT_VP8_FRAME v4l2_fourcc('V', 'P', '8', 'F') /* VP8 parsed frame */\n #define V4L2_PIX_FMT_VP9 v4l2_fourcc('V', 'P', '9', '0') /* VP9 */\n+#define V4L2_PIX_FMT_VP9_FRAME v4l2_fourcc('V', 'P', '9', 'F') /* VP9 parsed frame */\n #define V4L2_PIX_FMT_HEVC v4l2_fourcc('H', 'E', 'V', 'C') /* HEVC aka H.265 */\n #define V4L2_PIX_FMT_FWHT v4l2_fourcc('F', 'W', 'H', 'T') /* Fast Walsh Hadamard Transform (vicodec) */\n #define V4L2_PIX_FMT_FWHT_STATELESS v4l2_fourcc('S', 'F', 'W', 'H') /* Stateless FWHT (vicodec) */\n@@ -737,8 +741,10 @@ struct v4l2_pix_format {\n #define V4L2_PIX_FMT_INZI v4l2_fourcc('I', 'N', 'Z', 'I') /* Intel Planar Greyscale 10-bit and Depth 16-bit */\n #define V4L2_PIX_FMT_CNF4 v4l2_fourcc('C', 'N', 'F', '4') /* Intel 4-bit packed depth confidence information */\n #define V4L2_PIX_FMT_HI240 v4l2_fourcc('H', 'I', '2', '4') /* BTTV 8-bit dithered RGB */\n+#define V4L2_PIX_FMT_QC08C v4l2_fourcc('Q', '0', '8', 'C') /* Qualcomm 8-bit compressed */\n+#define V4L2_PIX_FMT_QC10C v4l2_fourcc('Q', '1', '0', 'C') /* Qualcomm 10-bit compressed */\n \n-/* 10bit raw bayer packed, 32 bytes for every 25 pixels, last LSB 6 bits unused */\n+/* 10bit raw packed, 32 bytes for every 25 pixels, last LSB 6 bits unused */\n #define V4L2_PIX_FMT_IPU3_SBGGR10\tv4l2_fourcc('i', 'p', '3', 'b') /* IPU3 packed 10-bit BGGR bayer */\n #define V4L2_PIX_FMT_IPU3_SGBRG10\tv4l2_fourcc('i', 'p', '3', 'g') /* IPU3 packed 10-bit GBRG bayer */\n #define V4L2_PIX_FMT_IPU3_SGRBG10\tv4l2_fourcc('i', 'p', '3', 'G') /* IPU3 packed 10-bit GRBG bayer */\n@@ -1732,6 +1738,8 @@ struct v4l2_ext_control {\n \t\tstruct v4l2_ctrl_mpeg2_sequence *p_mpeg2_sequence;\n \t\tstruct v4l2_ctrl_mpeg2_picture *p_mpeg2_picture;\n \t\tstruct v4l2_ctrl_mpeg2_quantisation *p_mpeg2_quantisation;\n+\t\tstruct v4l2_ctrl_vp9_compressed_hdr *p_vp9_compressed_hdr_probs;\n+\t\tstruct v4l2_ctrl_vp9_frame *p_vp9_frame;\n \t\tvoid *ptr;\n \t};\n } __attribute__ ((packed));\n@@ -1792,6 +1800,9 @@ enum v4l2_ctrl_type {\n \tV4L2_CTRL_TYPE_MPEG2_QUANTISATION = 0x0250,\n \tV4L2_CTRL_TYPE_MPEG2_SEQUENCE = 0x0251,\n \tV4L2_CTRL_TYPE_MPEG2_PICTURE = 0x0252,\n+\n+\tV4L2_CTRL_TYPE_VP9_COMPRESSED_HDR\t= 0x0260,\n+\tV4L2_CTRL_TYPE_VP9_FRAME\t\t= 0x0261,\n };\n \n /* Used in the VIDIOC_QUERYCTRL ioctl for querying controls */\n", "prefixes": [ "libcamera-devel", "01/13" ] }