| Message ID | 20220801000543.3501-2-laurent.pinchart@ideasonboard.com |
|---|---|
| State | Accepted |
| Headers | show |
| Series |
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| Related | show |
On Mon, Aug 01, 2022 at 03:05:31AM +0300, Laurent Pinchart via libcamera-devel wrote: > Update kernel headers to v5.19 using utils/update-kernel-headers.sh and > re-instating libcamera local modifications. Don't we need something better than this ? should we regularly rebase the libcamera-changes on top of a new header export per each kernel release ? Otherwise updating headers and re-applying the local modifications in one go makes it impossible to actually track what's local and what's upstream ? > > Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > --- > include/linux/README | 2 +- > include/linux/dma-buf.h | 4 +- > include/linux/drm_fourcc.h | 86 +++++++++- > include/linux/intel-ipu3.h | 35 ++-- > include/linux/v4l2-controls.h | 301 +++++++++++++++++++++++++++++++++- > include/linux/videodev2.h | 13 +- > 6 files changed, 418 insertions(+), 23 deletions(-) > > diff --git a/include/linux/README b/include/linux/README > index 4e314b9820ce..9f61517a119a 100644 > --- a/include/linux/README > +++ b/include/linux/README > @@ -1,4 +1,4 @@ > # SPDX-License-Identifier: CC0-1.0 > > -Files in this directory are imported from v5.16-rc7 of the Linux kernel. Do not > +Files in this directory are imported from v5.19 of the Linux kernel. Do not > modify them manually. > diff --git a/include/linux/dma-buf.h b/include/linux/dma-buf.h > index 8e4a2ca0bcbf..b1523cb8ab30 100644 > --- a/include/linux/dma-buf.h > +++ b/include/linux/dma-buf.h > @@ -92,7 +92,7 @@ struct dma_buf_sync { > * between them in actual uapi, they're just different numbers. > */ > #define DMA_BUF_SET_NAME _IOW(DMA_BUF_BASE, 1, const char *) > -#define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, u32) > -#define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, u64) > +#define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, __u32) > +#define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, __u64) > > #endif > diff --git a/include/linux/drm_fourcc.h b/include/linux/drm_fourcc.h > index ea11dcb405e5..cc69eecc606f 100644 > --- a/include/linux/drm_fourcc.h > +++ b/include/linux/drm_fourcc.h > @@ -314,6 +314,13 @@ extern "C" { > */ > #define DRM_FORMAT_P016 fourcc_code('P', '0', '1', '6') /* 2x2 subsampled Cr:Cb plane 16 bits per channel */ > > +/* 2 plane YCbCr420. > + * 3 10 bit components and 2 padding bits packed into 4 bytes. > + * index 0 = Y plane, [31:0] x:Y2:Y1:Y0 2:10:10:10 little endian > + * index 1 = Cr:Cb plane, [63:0] x:Cr2:Cb2:Cr1:x:Cb1:Cr0:Cb0 [2:10:10:10:2:10:10:10] little endian > + */ > +#define DRM_FORMAT_P030 fourcc_code('P', '0', '3', '0') /* 2x2 subsampled Cr:Cb plane 10 bits per channel packed */ > + > /* 3 plane non-subsampled (444) YCbCr > * 16 bits per component, but only 10 bits are used and 6 bits are padded > * index 0: Y plane, [15:0] Y:x [10:6] little endian > @@ -630,6 +637,53 @@ extern "C" { > */ > #define I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC fourcc_mod_code(INTEL, 8) > > +/* > + * Intel Tile 4 layout > + * > + * This is a tiled layout using 4KB tiles in a row-major layout. It has the same > + * shape as Tile Y at two granularities: 4KB (128B x 32) and 64B (16B x 4). It > + * only differs from Tile Y at the 256B granularity in between. At this > + * granularity, Tile Y has a shape of 16B x 32 rows, but this tiling has a shape > + * of 64B x 8 rows. > + */ > +#define I915_FORMAT_MOD_4_TILED fourcc_mod_code(INTEL, 9) > + > +/* > + * Intel color control surfaces (CCS) for DG2 render compression. > + * > + * The main surface is Tile 4 and at plane index 0. The CCS data is stored > + * outside of the GEM object in a reserved memory area dedicated for the > + * storage of the CCS data for all RC/RC_CC/MC compressible GEM objects. The > + * main surface pitch is required to be a multiple of four Tile 4 widths. > + */ > +#define I915_FORMAT_MOD_4_TILED_DG2_RC_CCS fourcc_mod_code(INTEL, 10) > + > +/* > + * Intel color control surfaces (CCS) for DG2 media compression. > + * > + * The main surface is Tile 4 and at plane index 0. For semi-planar formats > + * like NV12, the Y and UV planes are Tile 4 and are located at plane indices > + * 0 and 1, respectively. The CCS for all planes are stored outside of the > + * GEM object in a reserved memory area dedicated for the storage of the > + * CCS data for all RC/RC_CC/MC compressible GEM objects. The main surface > + * pitch is required to be a multiple of four Tile 4 widths. > + */ > +#define I915_FORMAT_MOD_4_TILED_DG2_MC_CCS fourcc_mod_code(INTEL, 11) > + > +/* > + * Intel Color Control Surface with Clear Color (CCS) for DG2 render compression. > + * > + * The main surface is Tile 4 and at plane index 0. The CCS data is stored > + * outside of the GEM object in a reserved memory area dedicated for the > + * storage of the CCS data for all RC/RC_CC/MC compressible GEM objects. The > + * main surface pitch is required to be a multiple of four Tile 4 widths. The > + * clear color is stored at plane index 1 and the pitch should be ignored. The > + * format of the 256 bits of clear color data matches the one used for the > + * I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC modifier, see its description > + * for details. > + */ > +#define I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC fourcc_mod_code(INTEL, 12) > + > /* > * IPU3 Bayer packing layout > * > @@ -638,7 +692,7 @@ extern "C" { > * the 6 most significant bits in the last byte unused. The format is little > * endian. > */ > -#define IPU3_FORMAT_MOD_PACKED fourcc_mod_code(INTEL, 9) > +#define IPU3_FORMAT_MOD_PACKED fourcc_mod_code(INTEL, 13) > > /* > * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks > @@ -677,6 +731,28 @@ extern "C" { > */ > #define DRM_FORMAT_MOD_QCOM_COMPRESSED fourcc_mod_code(QCOM, 1) > > +/* > + * Qualcomm Tiled Format > + * > + * Similar to DRM_FORMAT_MOD_QCOM_COMPRESSED but not compressed. > + * Implementation may be platform and base-format specific. > + * > + * Each macrotile consists of m x n (mostly 4 x 4) tiles. > + * Pixel data pitch/stride is aligned with macrotile width. > + * Pixel data height is aligned with macrotile height. > + * Entire pixel data buffer is aligned with 4k(bytes). > + */ > +#define DRM_FORMAT_MOD_QCOM_TILED3 fourcc_mod_code(QCOM, 3) > + > +/* > + * Qualcomm Alternate Tiled Format > + * > + * Alternate tiled format typically only used within GMEM. > + * Implementation may be platform and base-format specific. > + */ > +#define DRM_FORMAT_MOD_QCOM_TILED2 fourcc_mod_code(QCOM, 2) > + > + > /* Vivante framebuffer modifiers */ > > /* > @@ -929,6 +1005,10 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) > * and UV. Some SAND-using hardware stores UV in a separate tiled > * image from Y to reduce the column height, which is not supported > * with these modifiers. > + * > + * The DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT modifier is also > + * supported for DRM_FORMAT_P030 where the columns remain as 128 bytes > + * wide, but as this is a 10 bpp format that translates to 96 pixels. > */ > > #define DRM_FORMAT_MOD_BROADCOM_SAND32_COL_HEIGHT(v) \ > @@ -1439,11 +1519,11 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) > #define AMD_FMT_MOD_PIPE_MASK 0x7 > > #define AMD_FMT_MOD_SET(field, value) \ > - ((uint64_t)(value) << AMD_FMT_MOD_##field##_SHIFT) > + ((__u64)(value) << AMD_FMT_MOD_##field##_SHIFT) > #define AMD_FMT_MOD_GET(field, value) \ > (((value) >> AMD_FMT_MOD_##field##_SHIFT) & AMD_FMT_MOD_##field##_MASK) > #define AMD_FMT_MOD_CLEAR(field) \ > - (~((uint64_t)AMD_FMT_MOD_##field##_MASK << AMD_FMT_MOD_##field##_SHIFT)) > + (~((__u64)AMD_FMT_MOD_##field##_MASK << AMD_FMT_MOD_##field##_SHIFT)) > > /* Mobile Industry Processor Interface (MIPI) modifiers */ > > diff --git a/include/linux/intel-ipu3.h b/include/linux/intel-ipu3.h > index f30dce43d1d8..5c298ec557fa 100644 > --- a/include/linux/intel-ipu3.h > +++ b/include/linux/intel-ipu3.h > @@ -34,11 +34,17 @@ > * struct ipu3_uapi_grid_config - Grid plane config > * > * @width: Grid horizontal dimensions, in number of grid blocks(cells). > + * For AWB, the range is (16, 80). > + * For AF/AE, the range is (16, 32). > * @height: Grid vertical dimensions, in number of grid cells. > + * For AWB, the range is (16, 60). > + * For AF/AE, the range is (16, 24). > * @block_width_log2: Log2 of the width of each cell in pixels. > - * for (2^3, 2^4, 2^5, 2^6, 2^7), values [3, 7]. > + * For AWB, the range is [3, 6]. > + * For AF/AE, the range is [3, 7]. > * @block_height_log2: Log2 of the height of each cell in pixels. > - * for (2^3, 2^4, 2^5, 2^6, 2^7), values [3, 7]. > + * For AWB, the range is [3, 6]. > + * For AF/AE, the range is [3, 7]. > * @height_per_slice: The number of blocks in vertical axis per slice. > * Default 2. > * @x_start: X value of top left corner of Region of Interest(ROI). > @@ -68,21 +74,21 @@ struct ipu3_uapi_grid_config { > * @R_avg: Red average in the cell. > * @B_avg: Blue average in the cell. > * @Gb_avg: Green average for blue lines in the cell. > - * @sat_ratio: Percentage of pixels over a given threshold set in > + * @sat_ratio: Percentage of pixels over the thresholds specified in > * ipu3_uapi_awb_config_s, coded from 0 to 255. > - * @padding0: Unused byte for padding. > - * @padding1: Unused byte for padding. > - * @padding2: Unused byte for padding. > + * @padding0: Unused byte for padding. > + * @padding1: Unused byte for padding. > + * @padding2: Unused byte for padding. > */ > struct ipu3_uapi_awb_set_item { > - unsigned char Gr_avg; > - unsigned char R_avg; > - unsigned char B_avg; > - unsigned char Gb_avg; > - unsigned char sat_ratio; > - unsigned char padding0; > - unsigned char padding1; > - unsigned char padding2; > + __u8 Gr_avg; > + __u8 R_avg; > + __u8 B_avg; > + __u8 Gb_avg; > + __u8 sat_ratio; > + __u8 padding0; > + __u8 padding1; > + __u8 padding2; > } __attribute__((packed)); > > /* > @@ -98,7 +104,6 @@ struct ipu3_uapi_awb_set_item { > (IPU3_UAPI_AWB_MAX_SETS * \ > (IPU3_UAPI_AWB_SET_SIZE + IPU3_UAPI_AWB_SPARE_FOR_BUBBLES)) > > - > /** > * struct ipu3_uapi_awb_raw_buffer - AWB raw buffer > * > diff --git a/include/linux/v4l2-controls.h b/include/linux/v4l2-controls.h > index a055d2576253..9d2a8237e712 100644 > --- a/include/linux/v4l2-controls.h > +++ b/include/linux/v4l2-controls.h > @@ -128,6 +128,7 @@ enum v4l2_colorfx { > V4L2_COLORFX_SOLARIZATION = 13, > V4L2_COLORFX_ANTIQUE = 14, > V4L2_COLORFX_SET_CBCR = 15, > + V4L2_COLORFX_SET_RGB = 16, > }; > #define V4L2_CID_AUTOBRIGHTNESS (V4L2_CID_BASE+32) > #define V4L2_CID_BAND_STOP_FILTER (V4L2_CID_BASE+33) > @@ -145,9 +146,10 @@ enum v4l2_colorfx { > > #define V4L2_CID_ALPHA_COMPONENT (V4L2_CID_BASE+41) > #define V4L2_CID_COLORFX_CBCR (V4L2_CID_BASE+42) > +#define V4L2_CID_COLORFX_RGB (V4L2_CID_BASE+43) > > /* last CID + 1 */ > -#define V4L2_CID_LASTP1 (V4L2_CID_BASE+43) > +#define V4L2_CID_LASTP1 (V4L2_CID_BASE+44) > > /* USER-class private control IDs */ > > @@ -221,6 +223,12 @@ enum v4l2_colorfx { > */ > #define V4L2_CID_USER_ALLEGRO_BASE (V4L2_CID_USER_BASE + 0x1170) > > +/* > + * The base for the isl7998x driver controls. > + * We reserve 16 controls for this driver. > + */ > +#define V4L2_CID_USER_ISL7998X_BASE (V4L2_CID_USER_BASE + 0x1180) > + > /* MPEG-class control IDs */ > /* The MPEG controls are applicable to all codec controls > * and the 'MPEG' part of the define is historical */ > @@ -443,6 +451,11 @@ enum v4l2_mpeg_video_multi_slice_mode { > #define V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES (V4L2_CID_CODEC_BASE+234) > #define V4L2_CID_MPEG_VIDEO_DEC_CONCEAL_COLOR (V4L2_CID_CODEC_BASE+235) > #define V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD (V4L2_CID_CODEC_BASE+236) > +#define V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE (V4L2_CID_CODEC_BASE+237) > +enum v4l2_mpeg_video_intra_refresh_period_type { > + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM = 0, > + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC = 1, > +}; > > /* CIDs for the MPEG-2 Part 2 (H.262) codec */ > #define V4L2_CID_MPEG_VIDEO_MPEG2_LEVEL (V4L2_CID_CODEC_BASE+270) > @@ -1563,6 +1576,8 @@ struct v4l2_h264_dpb_entry { > #define V4L2_H264_DECODE_PARAM_FLAG_IDR_PIC 0x01 > #define V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC 0x02 > #define V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD 0x04 > +#define V4L2_H264_DECODE_PARAM_FLAG_PFRAME 0x08 > +#define V4L2_H264_DECODE_PARAM_FLAG_BFRAME 0x10 > > #define V4L2_CID_STATELESS_H264_DECODE_PARAMS (V4L2_CID_CODEC_STATELESS_BASE + 7) > /** > @@ -2018,6 +2033,290 @@ struct v4l2_ctrl_hdr10_mastering_display { > __u32 min_display_mastering_luminance; > }; > > +/* Stateless VP9 controls */ > + > +#define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED 0x1 > +#define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE 0x2 > + > +/** > + * struct v4l2_vp9_loop_filter - VP9 loop filter parameters > + * > + * @ref_deltas: contains the adjustment needed for the filter level based on the > + * chosen reference frame. If this syntax element is not present in the bitstream, > + * users should pass its last value. > + * @mode_deltas: contains the adjustment needed for the filter level based on the > + * chosen mode. If this syntax element is not present in the bitstream, users should > + * pass its last value. > + * @level: indicates the loop filter strength. > + * @sharpness: indicates the sharpness level. > + * @flags: combination of V4L2_VP9_LOOP_FILTER_FLAG_{} flags. > + * @reserved: padding field. Should be zeroed by applications. > + * > + * This structure contains all loop filter related parameters. See sections > + * '7.2.8 Loop filter semantics' of the VP9 specification for more details. > + */ > +struct v4l2_vp9_loop_filter { > + __s8 ref_deltas[4]; > + __s8 mode_deltas[2]; > + __u8 level; > + __u8 sharpness; > + __u8 flags; > + __u8 reserved[7]; > +}; > + > +/** > + * struct v4l2_vp9_quantization - VP9 quantization parameters > + * > + * @base_q_idx: indicates the base frame qindex. > + * @delta_q_y_dc: indicates the Y DC quantizer relative to base_q_idx. > + * @delta_q_uv_dc: indicates the UV DC quantizer relative to base_q_idx. > + * @delta_q_uv_ac: indicates the UV AC quantizer relative to base_q_idx. > + * @reserved: padding field. Should be zeroed by applications. > + * > + * Encodes the quantization parameters. See section '7.2.9 Quantization params > + * syntax' of the VP9 specification for more details. > + */ > +struct v4l2_vp9_quantization { > + __u8 base_q_idx; > + __s8 delta_q_y_dc; > + __s8 delta_q_uv_dc; > + __s8 delta_q_uv_ac; > + __u8 reserved[4]; > +}; > + > +#define V4L2_VP9_SEGMENTATION_FLAG_ENABLED 0x01 > +#define V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP 0x02 > +#define V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE 0x04 > +#define V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA 0x08 > +#define V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE 0x10 > + > +#define V4L2_VP9_SEG_LVL_ALT_Q 0 > +#define V4L2_VP9_SEG_LVL_ALT_L 1 > +#define V4L2_VP9_SEG_LVL_REF_FRAME 2 > +#define V4L2_VP9_SEG_LVL_SKIP 3 > +#define V4L2_VP9_SEG_LVL_MAX 4 > + > +#define V4L2_VP9_SEGMENT_FEATURE_ENABLED(id) (1 << (id)) > +#define V4L2_VP9_SEGMENT_FEATURE_ENABLED_MASK 0xf > + > +/** > + * struct v4l2_vp9_segmentation - VP9 segmentation parameters > + * > + * @feature_data: data attached to each feature. Data entry is only valid if > + * the feature is enabled. The array shall be indexed with segment number as > + * the first dimension (0..7) and one of V4L2_VP9_SEG_{} as the second dimension. > + * @feature_enabled: bitmask defining which features are enabled in each segment. > + * The value for each segment is a combination of V4L2_VP9_SEGMENT_FEATURE_ENABLED(id) > + * values where id is one of V4L2_VP9_SEG_LVL_{}. > + * @tree_probs: specifies the probability values to be used when decoding a > + * Segment-ID. See '5.15. Segmentation map' section of the VP9 specification > + * for more details. > + * @pred_probs: specifies the probability values to be used when decoding a > + * Predicted-Segment-ID. See '6.4.14. Get segment id syntax' section of :ref:`vp9` > + * for more details. > + * @flags: combination of V4L2_VP9_SEGMENTATION_FLAG_{} flags. > + * @reserved: padding field. Should be zeroed by applications. > + * > + * Encodes the quantization parameters. See section '7.2.10 Segmentation params syntax' of > + * the VP9 specification for more details. > + */ > +struct v4l2_vp9_segmentation { > + __s16 feature_data[8][4]; > + __u8 feature_enabled[8]; > + __u8 tree_probs[7]; > + __u8 pred_probs[3]; > + __u8 flags; > + __u8 reserved[5]; > +}; > + > +#define V4L2_VP9_FRAME_FLAG_KEY_FRAME 0x001 > +#define V4L2_VP9_FRAME_FLAG_SHOW_FRAME 0x002 > +#define V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT 0x004 > +#define V4L2_VP9_FRAME_FLAG_INTRA_ONLY 0x008 > +#define V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV 0x010 > +#define V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX 0x020 > +#define V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE 0x040 > +#define V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING 0x080 > +#define V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING 0x100 > +#define V4L2_VP9_FRAME_FLAG_COLOR_RANGE_FULL_SWING 0x200 > + > +#define V4L2_VP9_SIGN_BIAS_LAST 0x1 > +#define V4L2_VP9_SIGN_BIAS_GOLDEN 0x2 > +#define V4L2_VP9_SIGN_BIAS_ALT 0x4 > + > +#define V4L2_VP9_RESET_FRAME_CTX_NONE 0 > +#define V4L2_VP9_RESET_FRAME_CTX_SPEC 1 > +#define V4L2_VP9_RESET_FRAME_CTX_ALL 2 > + > +#define V4L2_VP9_INTERP_FILTER_EIGHTTAP 0 > +#define V4L2_VP9_INTERP_FILTER_EIGHTTAP_SMOOTH 1 > +#define V4L2_VP9_INTERP_FILTER_EIGHTTAP_SHARP 2 > +#define V4L2_VP9_INTERP_FILTER_BILINEAR 3 > +#define V4L2_VP9_INTERP_FILTER_SWITCHABLE 4 > + > +#define V4L2_VP9_REFERENCE_MODE_SINGLE_REFERENCE 0 > +#define V4L2_VP9_REFERENCE_MODE_COMPOUND_REFERENCE 1 > +#define V4L2_VP9_REFERENCE_MODE_SELECT 2 > + > +#define V4L2_VP9_PROFILE_MAX 3 > + > +#define V4L2_CID_STATELESS_VP9_FRAME (V4L2_CID_CODEC_STATELESS_BASE + 300) > +/** > + * struct v4l2_ctrl_vp9_frame - VP9 frame decoding control > + * > + * @lf: loop filter parameters. See &v4l2_vp9_loop_filter for more details. > + * @quant: quantization parameters. See &v4l2_vp9_quantization for more details. > + * @seg: segmentation parameters. See &v4l2_vp9_segmentation for more details. > + * @flags: combination of V4L2_VP9_FRAME_FLAG_{} flags. > + * @compressed_header_size: compressed header size in bytes. > + * @uncompressed_header_size: uncompressed header size in bytes. > + * @frame_width_minus_1: add 1 to it and you'll get the frame width expressed in pixels. > + * @frame_height_minus_1: add 1 to it and you'll get the frame height expressed in pixels. > + * @render_width_minus_1: add 1 to it and you'll get the expected render width expressed in > + * pixels. This is not used during the decoding process but might be used by HW scalers > + * to prepare a frame that's ready for scanout. > + * @render_height_minus_1: add 1 to it and you'll get the expected render height expressed in > + * pixels. This is not used during the decoding process but might be used by HW scalers > + * to prepare a frame that's ready for scanout. > + * @last_frame_ts: "last" reference buffer timestamp. > + * The timestamp refers to the timestamp field in struct v4l2_buffer. > + * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64. > + * @golden_frame_ts: "golden" reference buffer timestamp. > + * The timestamp refers to the timestamp field in struct v4l2_buffer. > + * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64. > + * @alt_frame_ts: "alt" reference buffer timestamp. > + * The timestamp refers to the timestamp field in struct v4l2_buffer. > + * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64. > + * @ref_frame_sign_bias: a bitfield specifying whether the sign bias is set for a given > + * reference frame. Either of V4L2_VP9_SIGN_BIAS_{}. > + * @reset_frame_context: specifies whether the frame context should be reset to default values. > + * Either of V4L2_VP9_RESET_FRAME_CTX_{}. > + * @frame_context_idx: frame context that should be used/updated. > + * @profile: VP9 profile. Can be 0, 1, 2 or 3. > + * @bit_depth: bits per components. Can be 8, 10 or 12. Note that not all profiles support > + * 10 and/or 12 bits depths. > + * @interpolation_filter: specifies the filter selection used for performing inter prediction. > + * Set to one of V4L2_VP9_INTERP_FILTER_{}. > + * @tile_cols_log2: specifies the base 2 logarithm of the width of each tile (where the width > + * is measured in units of 8x8 blocks). Shall be less than or equal to 6. > + * @tile_rows_log2: specifies the base 2 logarithm of the height of each tile (where the height > + * is measured in units of 8x8 blocks). > + * @reference_mode: specifies the type of inter prediction to be used. > + * Set to one of V4L2_VP9_REFERENCE_MODE_{}. > + * @reserved: padding field. Should be zeroed by applications. > + */ > +struct v4l2_ctrl_vp9_frame { > + struct v4l2_vp9_loop_filter lf; > + struct v4l2_vp9_quantization quant; > + struct v4l2_vp9_segmentation seg; > + __u32 flags; > + __u16 compressed_header_size; > + __u16 uncompressed_header_size; > + __u16 frame_width_minus_1; > + __u16 frame_height_minus_1; > + __u16 render_width_minus_1; > + __u16 render_height_minus_1; > + __u64 last_frame_ts; > + __u64 golden_frame_ts; > + __u64 alt_frame_ts; > + __u8 ref_frame_sign_bias; > + __u8 reset_frame_context; > + __u8 frame_context_idx; > + __u8 profile; > + __u8 bit_depth; > + __u8 interpolation_filter; > + __u8 tile_cols_log2; > + __u8 tile_rows_log2; > + __u8 reference_mode; > + __u8 reserved[7]; > +}; > + > +#define V4L2_VP9_NUM_FRAME_CTX 4 > + > +/** > + * struct v4l2_vp9_mv_probs - VP9 Motion vector probability updates > + * @joint: motion vector joint probability updates. > + * @sign: motion vector sign probability updates. > + * @classes: motion vector class probability updates. > + * @class0_bit: motion vector class0 bit probability updates. > + * @bits: motion vector bits probability updates. > + * @class0_fr: motion vector class0 fractional bit probability updates. > + * @fr: motion vector fractional bit probability updates. > + * @class0_hp: motion vector class0 high precision fractional bit probability updates. > + * @hp: motion vector high precision fractional bit probability updates. > + * > + * This structure contains new values of motion vector probabilities. > + * A value of zero in an array element means there is no update of the relevant probability. > + * See `struct v4l2_vp9_prob_updates` for details. > + */ > +struct v4l2_vp9_mv_probs { > + __u8 joint[3]; > + __u8 sign[2]; > + __u8 classes[2][10]; > + __u8 class0_bit[2]; > + __u8 bits[2][10]; > + __u8 class0_fr[2][2][3]; > + __u8 fr[2][3]; > + __u8 class0_hp[2]; > + __u8 hp[2]; > +}; > + > +#define V4L2_CID_STATELESS_VP9_COMPRESSED_HDR (V4L2_CID_CODEC_STATELESS_BASE + 301) > + > +#define V4L2_VP9_TX_MODE_ONLY_4X4 0 > +#define V4L2_VP9_TX_MODE_ALLOW_8X8 1 > +#define V4L2_VP9_TX_MODE_ALLOW_16X16 2 > +#define V4L2_VP9_TX_MODE_ALLOW_32X32 3 > +#define V4L2_VP9_TX_MODE_SELECT 4 > + > +/** > + * struct v4l2_ctrl_vp9_compressed_hdr - VP9 probability updates control > + * @tx_mode: specifies the TX mode. Set to one of V4L2_VP9_TX_MODE_{}. > + * @tx8: TX 8x8 probability updates. > + * @tx16: TX 16x16 probability updates. > + * @tx32: TX 32x32 probability updates. > + * @coef: coefficient probability updates. > + * @skip: skip probability updates. > + * @inter_mode: inter mode probability updates. > + * @interp_filter: interpolation filter probability updates. > + * @is_inter: is inter-block probability updates. > + * @comp_mode: compound prediction mode probability updates. > + * @single_ref: single ref probability updates. > + * @comp_ref: compound ref probability updates. > + * @y_mode: Y prediction mode probability updates. > + * @uv_mode: UV prediction mode probability updates. > + * @partition: partition probability updates. > + * @mv: motion vector probability updates. > + * > + * This structure holds the probabilities update as parsed in the compressed > + * header (Spec 6.3). These values represent the value of probability update after > + * being translated with inv_map_table[] (see 6.3.5). A value of zero in an array element > + * means that there is no update of the relevant probability. > + * > + * This control is optional and needs to be used when dealing with the hardware which is > + * not capable of parsing the compressed header itself. Only drivers which need it will > + * implement it. > + */ > +struct v4l2_ctrl_vp9_compressed_hdr { > + __u8 tx_mode; > + __u8 tx8[2][1]; > + __u8 tx16[2][2]; > + __u8 tx32[2][3]; > + __u8 coef[4][2][2][6][6][3]; > + __u8 skip[3]; > + __u8 inter_mode[7][3]; > + __u8 interp_filter[4][2]; > + __u8 is_inter[4]; > + __u8 comp_mode[5]; > + __u8 single_ref[5][2]; > + __u8 comp_ref[5]; > + __u8 y_mode[4][9]; > + __u8 uv_mode[10][9]; > + __u8 partition[16][3]; > + > + struct v4l2_vp9_mv_probs mv; > +}; > + > /* MPEG-compression definitions kept for backwards compatibility */ > #define V4L2_CTRL_CLASS_MPEG V4L2_CTRL_CLASS_CODEC > #define V4L2_CID_MPEG_CLASS V4L2_CID_CODEC_CLASS > diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h > index dcc0b01dfa9a..6e3d58e5a5c4 100644 > --- a/include/linux/videodev2.h > +++ b/include/linux/videodev2.h > @@ -563,6 +563,7 @@ struct v4l2_pix_format { > /* Grey bit-packed formats */ > #define V4L2_PIX_FMT_Y10BPACK v4l2_fourcc('Y', '1', '0', 'B') /* 10 Greyscale bit-packed */ > #define V4L2_PIX_FMT_Y10P v4l2_fourcc('Y', '1', '0', 'P') /* 10 Greyscale, MIPI RAW10 packed */ > +#define V4L2_PIX_FMT_IPU3_Y10 v4l2_fourcc('i', 'p', '3', 'y') /* IPU3 packed 10-bit greyscale */ > > /* Palette formats */ > #define V4L2_PIX_FMT_PAL8 v4l2_fourcc('P', 'A', 'L', '8') /* 8 8-bit palette */ > @@ -626,6 +627,8 @@ struct v4l2_pix_format { > /* Tiled YUV formats, non contiguous planes */ > #define V4L2_PIX_FMT_NV12MT v4l2_fourcc('T', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 64x32 tiles */ > #define V4L2_PIX_FMT_NV12MT_16X16 v4l2_fourcc('V', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 16x16 tiles */ > +#define V4L2_PIX_FMT_NV12M_8L128 v4l2_fourcc('N', 'A', '1', '2') /* Y/CbCr 4:2:0 8x128 tiles */ > +#define V4L2_PIX_FMT_NV12M_10BE_8L128 v4l2_fourcc_be('N', 'T', '1', '2') /* Y/CbCr 4:2:0 10-bit 8x128 tiles */ > > /* Bayer formats - see http://www.siliconimaging.com/RGB%20Bayer.htm */ > #define V4L2_PIX_FMT_SBGGR8 v4l2_fourcc('B', 'A', '8', '1') /* 8 BGBG.. GRGR.. */ > @@ -697,6 +700,7 @@ struct v4l2_pix_format { > #define V4L2_PIX_FMT_VP8 v4l2_fourcc('V', 'P', '8', '0') /* VP8 */ > #define V4L2_PIX_FMT_VP8_FRAME v4l2_fourcc('V', 'P', '8', 'F') /* VP8 parsed frame */ > #define V4L2_PIX_FMT_VP9 v4l2_fourcc('V', 'P', '9', '0') /* VP9 */ > +#define V4L2_PIX_FMT_VP9_FRAME v4l2_fourcc('V', 'P', '9', 'F') /* VP9 parsed frame */ > #define V4L2_PIX_FMT_HEVC v4l2_fourcc('H', 'E', 'V', 'C') /* HEVC aka H.265 */ > #define V4L2_PIX_FMT_FWHT v4l2_fourcc('F', 'W', 'H', 'T') /* Fast Walsh Hadamard Transform (vicodec) */ > #define V4L2_PIX_FMT_FWHT_STATELESS v4l2_fourcc('S', 'F', 'W', 'H') /* Stateless FWHT (vicodec) */ > @@ -737,8 +741,10 @@ struct v4l2_pix_format { > #define V4L2_PIX_FMT_INZI v4l2_fourcc('I', 'N', 'Z', 'I') /* Intel Planar Greyscale 10-bit and Depth 16-bit */ > #define V4L2_PIX_FMT_CNF4 v4l2_fourcc('C', 'N', 'F', '4') /* Intel 4-bit packed depth confidence information */ > #define V4L2_PIX_FMT_HI240 v4l2_fourcc('H', 'I', '2', '4') /* BTTV 8-bit dithered RGB */ > +#define V4L2_PIX_FMT_QC08C v4l2_fourcc('Q', '0', '8', 'C') /* Qualcomm 8-bit compressed */ > +#define V4L2_PIX_FMT_QC10C v4l2_fourcc('Q', '1', '0', 'C') /* Qualcomm 10-bit compressed */ > > -/* 10bit raw bayer packed, 32 bytes for every 25 pixels, last LSB 6 bits unused */ > +/* 10bit raw packed, 32 bytes for every 25 pixels, last LSB 6 bits unused */ > #define V4L2_PIX_FMT_IPU3_SBGGR10 v4l2_fourcc('i', 'p', '3', 'b') /* IPU3 packed 10-bit BGGR bayer */ > #define V4L2_PIX_FMT_IPU3_SGBRG10 v4l2_fourcc('i', 'p', '3', 'g') /* IPU3 packed 10-bit GBRG bayer */ > #define V4L2_PIX_FMT_IPU3_SGRBG10 v4l2_fourcc('i', 'p', '3', 'G') /* IPU3 packed 10-bit GRBG bayer */ > @@ -1732,6 +1738,8 @@ struct v4l2_ext_control { > struct v4l2_ctrl_mpeg2_sequence *p_mpeg2_sequence; > struct v4l2_ctrl_mpeg2_picture *p_mpeg2_picture; > struct v4l2_ctrl_mpeg2_quantisation *p_mpeg2_quantisation; > + struct v4l2_ctrl_vp9_compressed_hdr *p_vp9_compressed_hdr_probs; > + struct v4l2_ctrl_vp9_frame *p_vp9_frame; > void *ptr; > }; > } __attribute__ ((packed)); > @@ -1792,6 +1800,9 @@ enum v4l2_ctrl_type { > V4L2_CTRL_TYPE_MPEG2_QUANTISATION = 0x0250, > V4L2_CTRL_TYPE_MPEG2_SEQUENCE = 0x0251, > V4L2_CTRL_TYPE_MPEG2_PICTURE = 0x0252, > + > + V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR = 0x0260, > + V4L2_CTRL_TYPE_VP9_FRAME = 0x0261, > }; > > /* Used in the VIDIOC_QUERYCTRL ioctl for querying controls */ > -- > Regards, > > Laurent Pinchart >
Hi Jacopo, On Mon, Aug 01, 2022 at 05:16:29PM +0200, Jacopo Mondi wrote: > On Mon, Aug 01, 2022 at 03:05:31AM +0300, Laurent Pinchart via libcamera-devel wrote: > > Update kernel headers to v5.19 using utils/update-kernel-headers.sh and > > re-instating libcamera local modifications. > > Don't we need something better than this ? > > should we regularly rebase the libcamera-changes on top of a new > header export per each kernel release ? > > Otherwise updating headers and re-applying the local modifications in > one go makes it impossible to actually track what's local and what's > upstream ? This patch was possibly easier to generate than it is to review. The update-kernel-headers.sh script undoes all the local changes, and I've then used git add -p to avoid picking up the reverts. This is a manual process that can lead to errors. On the review side, it's really about making sure that the update doesn't drop any of the features we depend on. It may seem error-prone too, but most (not all though) of the local changes we carry will be detected at compilation time of reverted. The best way to avoid all this is of course to upstream all the changes, and that's something we keep working on, with various delays depending on the features. For instance, patches 02/13 and 03/13 in this series will effectively disappear once we upgrade to the v5.20 kernel headers. Other changes take longer to upstream. I'm open to other ideas to improve the process, but completely overwriting the headers and then reapplying local changes on top will break compilation during bisection. > > Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > > --- > > include/linux/README | 2 +- > > include/linux/dma-buf.h | 4 +- > > include/linux/drm_fourcc.h | 86 +++++++++- > > include/linux/intel-ipu3.h | 35 ++-- > > include/linux/v4l2-controls.h | 301 +++++++++++++++++++++++++++++++++- > > include/linux/videodev2.h | 13 +- > > 6 files changed, 418 insertions(+), 23 deletions(-) > > > > diff --git a/include/linux/README b/include/linux/README > > index 4e314b9820ce..9f61517a119a 100644 > > --- a/include/linux/README > > +++ b/include/linux/README > > @@ -1,4 +1,4 @@ > > # SPDX-License-Identifier: CC0-1.0 > > > > -Files in this directory are imported from v5.16-rc7 of the Linux kernel. Do not > > +Files in this directory are imported from v5.19 of the Linux kernel. Do not > > modify them manually. > > diff --git a/include/linux/dma-buf.h b/include/linux/dma-buf.h > > index 8e4a2ca0bcbf..b1523cb8ab30 100644 > > --- a/include/linux/dma-buf.h > > +++ b/include/linux/dma-buf.h > > @@ -92,7 +92,7 @@ struct dma_buf_sync { > > * between them in actual uapi, they're just different numbers. > > */ > > #define DMA_BUF_SET_NAME _IOW(DMA_BUF_BASE, 1, const char *) > > -#define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, u32) > > -#define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, u64) > > +#define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, __u32) > > +#define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, __u64) > > > > #endif > > diff --git a/include/linux/drm_fourcc.h b/include/linux/drm_fourcc.h > > index ea11dcb405e5..cc69eecc606f 100644 > > --- a/include/linux/drm_fourcc.h > > +++ b/include/linux/drm_fourcc.h > > @@ -314,6 +314,13 @@ extern "C" { > > */ > > #define DRM_FORMAT_P016 fourcc_code('P', '0', '1', '6') /* 2x2 subsampled Cr:Cb plane 16 bits per channel */ > > > > +/* 2 plane YCbCr420. > > + * 3 10 bit components and 2 padding bits packed into 4 bytes. > > + * index 0 = Y plane, [31:0] x:Y2:Y1:Y0 2:10:10:10 little endian > > + * index 1 = Cr:Cb plane, [63:0] x:Cr2:Cb2:Cr1:x:Cb1:Cr0:Cb0 [2:10:10:10:2:10:10:10] little endian > > + */ > > +#define DRM_FORMAT_P030 fourcc_code('P', '0', '3', '0') /* 2x2 subsampled Cr:Cb plane 10 bits per channel packed */ > > + > > /* 3 plane non-subsampled (444) YCbCr > > * 16 bits per component, but only 10 bits are used and 6 bits are padded > > * index 0: Y plane, [15:0] Y:x [10:6] little endian > > @@ -630,6 +637,53 @@ extern "C" { > > */ > > #define I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC fourcc_mod_code(INTEL, 8) > > > > +/* > > + * Intel Tile 4 layout > > + * > > + * This is a tiled layout using 4KB tiles in a row-major layout. It has the same > > + * shape as Tile Y at two granularities: 4KB (128B x 32) and 64B (16B x 4). It > > + * only differs from Tile Y at the 256B granularity in between. At this > > + * granularity, Tile Y has a shape of 16B x 32 rows, but this tiling has a shape > > + * of 64B x 8 rows. > > + */ > > +#define I915_FORMAT_MOD_4_TILED fourcc_mod_code(INTEL, 9) > > + > > +/* > > + * Intel color control surfaces (CCS) for DG2 render compression. > > + * > > + * The main surface is Tile 4 and at plane index 0. The CCS data is stored > > + * outside of the GEM object in a reserved memory area dedicated for the > > + * storage of the CCS data for all RC/RC_CC/MC compressible GEM objects. The > > + * main surface pitch is required to be a multiple of four Tile 4 widths. > > + */ > > +#define I915_FORMAT_MOD_4_TILED_DG2_RC_CCS fourcc_mod_code(INTEL, 10) > > + > > +/* > > + * Intel color control surfaces (CCS) for DG2 media compression. > > + * > > + * The main surface is Tile 4 and at plane index 0. For semi-planar formats > > + * like NV12, the Y and UV planes are Tile 4 and are located at plane indices > > + * 0 and 1, respectively. The CCS for all planes are stored outside of the > > + * GEM object in a reserved memory area dedicated for the storage of the > > + * CCS data for all RC/RC_CC/MC compressible GEM objects. The main surface > > + * pitch is required to be a multiple of four Tile 4 widths. > > + */ > > +#define I915_FORMAT_MOD_4_TILED_DG2_MC_CCS fourcc_mod_code(INTEL, 11) > > + > > +/* > > + * Intel Color Control Surface with Clear Color (CCS) for DG2 render compression. > > + * > > + * The main surface is Tile 4 and at plane index 0. The CCS data is stored > > + * outside of the GEM object in a reserved memory area dedicated for the > > + * storage of the CCS data for all RC/RC_CC/MC compressible GEM objects. The > > + * main surface pitch is required to be a multiple of four Tile 4 widths. The > > + * clear color is stored at plane index 1 and the pitch should be ignored. The > > + * format of the 256 bits of clear color data matches the one used for the > > + * I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC modifier, see its description > > + * for details. > > + */ > > +#define I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC fourcc_mod_code(INTEL, 12) > > + > > /* > > * IPU3 Bayer packing layout > > * > > @@ -638,7 +692,7 @@ extern "C" { > > * the 6 most significant bits in the last byte unused. The format is little > > * endian. > > */ > > -#define IPU3_FORMAT_MOD_PACKED fourcc_mod_code(INTEL, 9) > > +#define IPU3_FORMAT_MOD_PACKED fourcc_mod_code(INTEL, 13) > > > > /* > > * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks > > @@ -677,6 +731,28 @@ extern "C" { > > */ > > #define DRM_FORMAT_MOD_QCOM_COMPRESSED fourcc_mod_code(QCOM, 1) > > > > +/* > > + * Qualcomm Tiled Format > > + * > > + * Similar to DRM_FORMAT_MOD_QCOM_COMPRESSED but not compressed. > > + * Implementation may be platform and base-format specific. > > + * > > + * Each macrotile consists of m x n (mostly 4 x 4) tiles. > > + * Pixel data pitch/stride is aligned with macrotile width. > > + * Pixel data height is aligned with macrotile height. > > + * Entire pixel data buffer is aligned with 4k(bytes). > > + */ > > +#define DRM_FORMAT_MOD_QCOM_TILED3 fourcc_mod_code(QCOM, 3) > > + > > +/* > > + * Qualcomm Alternate Tiled Format > > + * > > + * Alternate tiled format typically only used within GMEM. > > + * Implementation may be platform and base-format specific. > > + */ > > +#define DRM_FORMAT_MOD_QCOM_TILED2 fourcc_mod_code(QCOM, 2) > > + > > + > > /* Vivante framebuffer modifiers */ > > > > /* > > @@ -929,6 +1005,10 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) > > * and UV. Some SAND-using hardware stores UV in a separate tiled > > * image from Y to reduce the column height, which is not supported > > * with these modifiers. > > + * > > + * The DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT modifier is also > > + * supported for DRM_FORMAT_P030 where the columns remain as 128 bytes > > + * wide, but as this is a 10 bpp format that translates to 96 pixels. > > */ > > > > #define DRM_FORMAT_MOD_BROADCOM_SAND32_COL_HEIGHT(v) \ > > @@ -1439,11 +1519,11 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) > > #define AMD_FMT_MOD_PIPE_MASK 0x7 > > > > #define AMD_FMT_MOD_SET(field, value) \ > > - ((uint64_t)(value) << AMD_FMT_MOD_##field##_SHIFT) > > + ((__u64)(value) << AMD_FMT_MOD_##field##_SHIFT) > > #define AMD_FMT_MOD_GET(field, value) \ > > (((value) >> AMD_FMT_MOD_##field##_SHIFT) & AMD_FMT_MOD_##field##_MASK) > > #define AMD_FMT_MOD_CLEAR(field) \ > > - (~((uint64_t)AMD_FMT_MOD_##field##_MASK << AMD_FMT_MOD_##field##_SHIFT)) > > + (~((__u64)AMD_FMT_MOD_##field##_MASK << AMD_FMT_MOD_##field##_SHIFT)) > > > > /* Mobile Industry Processor Interface (MIPI) modifiers */ > > > > diff --git a/include/linux/intel-ipu3.h b/include/linux/intel-ipu3.h > > index f30dce43d1d8..5c298ec557fa 100644 > > --- a/include/linux/intel-ipu3.h > > +++ b/include/linux/intel-ipu3.h > > @@ -34,11 +34,17 @@ > > * struct ipu3_uapi_grid_config - Grid plane config > > * > > * @width: Grid horizontal dimensions, in number of grid blocks(cells). > > + * For AWB, the range is (16, 80). > > + * For AF/AE, the range is (16, 32). > > * @height: Grid vertical dimensions, in number of grid cells. > > + * For AWB, the range is (16, 60). > > + * For AF/AE, the range is (16, 24). > > * @block_width_log2: Log2 of the width of each cell in pixels. > > - * for (2^3, 2^4, 2^5, 2^6, 2^7), values [3, 7]. > > + * For AWB, the range is [3, 6]. > > + * For AF/AE, the range is [3, 7]. > > * @block_height_log2: Log2 of the height of each cell in pixels. > > - * for (2^3, 2^4, 2^5, 2^6, 2^7), values [3, 7]. > > + * For AWB, the range is [3, 6]. > > + * For AF/AE, the range is [3, 7]. > > * @height_per_slice: The number of blocks in vertical axis per slice. > > * Default 2. > > * @x_start: X value of top left corner of Region of Interest(ROI). > > @@ -68,21 +74,21 @@ struct ipu3_uapi_grid_config { > > * @R_avg: Red average in the cell. > > * @B_avg: Blue average in the cell. > > * @Gb_avg: Green average for blue lines in the cell. > > - * @sat_ratio: Percentage of pixels over a given threshold set in > > + * @sat_ratio: Percentage of pixels over the thresholds specified in > > * ipu3_uapi_awb_config_s, coded from 0 to 255. > > - * @padding0: Unused byte for padding. > > - * @padding1: Unused byte for padding. > > - * @padding2: Unused byte for padding. > > + * @padding0: Unused byte for padding. > > + * @padding1: Unused byte for padding. > > + * @padding2: Unused byte for padding. > > */ > > struct ipu3_uapi_awb_set_item { > > - unsigned char Gr_avg; > > - unsigned char R_avg; > > - unsigned char B_avg; > > - unsigned char Gb_avg; > > - unsigned char sat_ratio; > > - unsigned char padding0; > > - unsigned char padding1; > > - unsigned char padding2; > > + __u8 Gr_avg; > > + __u8 R_avg; > > + __u8 B_avg; > > + __u8 Gb_avg; > > + __u8 sat_ratio; > > + __u8 padding0; > > + __u8 padding1; > > + __u8 padding2; > > } __attribute__((packed)); > > > > /* > > @@ -98,7 +104,6 @@ struct ipu3_uapi_awb_set_item { > > (IPU3_UAPI_AWB_MAX_SETS * \ > > (IPU3_UAPI_AWB_SET_SIZE + IPU3_UAPI_AWB_SPARE_FOR_BUBBLES)) > > > > - > > /** > > * struct ipu3_uapi_awb_raw_buffer - AWB raw buffer > > * > > diff --git a/include/linux/v4l2-controls.h b/include/linux/v4l2-controls.h > > index a055d2576253..9d2a8237e712 100644 > > --- a/include/linux/v4l2-controls.h > > +++ b/include/linux/v4l2-controls.h > > @@ -128,6 +128,7 @@ enum v4l2_colorfx { > > V4L2_COLORFX_SOLARIZATION = 13, > > V4L2_COLORFX_ANTIQUE = 14, > > V4L2_COLORFX_SET_CBCR = 15, > > + V4L2_COLORFX_SET_RGB = 16, > > }; > > #define V4L2_CID_AUTOBRIGHTNESS (V4L2_CID_BASE+32) > > #define V4L2_CID_BAND_STOP_FILTER (V4L2_CID_BASE+33) > > @@ -145,9 +146,10 @@ enum v4l2_colorfx { > > > > #define V4L2_CID_ALPHA_COMPONENT (V4L2_CID_BASE+41) > > #define V4L2_CID_COLORFX_CBCR (V4L2_CID_BASE+42) > > +#define V4L2_CID_COLORFX_RGB (V4L2_CID_BASE+43) > > > > /* last CID + 1 */ > > -#define V4L2_CID_LASTP1 (V4L2_CID_BASE+43) > > +#define V4L2_CID_LASTP1 (V4L2_CID_BASE+44) > > > > /* USER-class private control IDs */ > > > > @@ -221,6 +223,12 @@ enum v4l2_colorfx { > > */ > > #define V4L2_CID_USER_ALLEGRO_BASE (V4L2_CID_USER_BASE + 0x1170) > > > > +/* > > + * The base for the isl7998x driver controls. > > + * We reserve 16 controls for this driver. > > + */ > > +#define V4L2_CID_USER_ISL7998X_BASE (V4L2_CID_USER_BASE + 0x1180) > > + > > /* MPEG-class control IDs */ > > /* The MPEG controls are applicable to all codec controls > > * and the 'MPEG' part of the define is historical */ > > @@ -443,6 +451,11 @@ enum v4l2_mpeg_video_multi_slice_mode { > > #define V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES (V4L2_CID_CODEC_BASE+234) > > #define V4L2_CID_MPEG_VIDEO_DEC_CONCEAL_COLOR (V4L2_CID_CODEC_BASE+235) > > #define V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD (V4L2_CID_CODEC_BASE+236) > > +#define V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE (V4L2_CID_CODEC_BASE+237) > > +enum v4l2_mpeg_video_intra_refresh_period_type { > > + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM = 0, > > + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC = 1, > > +}; > > > > /* CIDs for the MPEG-2 Part 2 (H.262) codec */ > > #define V4L2_CID_MPEG_VIDEO_MPEG2_LEVEL (V4L2_CID_CODEC_BASE+270) > > @@ -1563,6 +1576,8 @@ struct v4l2_h264_dpb_entry { > > #define V4L2_H264_DECODE_PARAM_FLAG_IDR_PIC 0x01 > > #define V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC 0x02 > > #define V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD 0x04 > > +#define V4L2_H264_DECODE_PARAM_FLAG_PFRAME 0x08 > > +#define V4L2_H264_DECODE_PARAM_FLAG_BFRAME 0x10 > > > > #define V4L2_CID_STATELESS_H264_DECODE_PARAMS (V4L2_CID_CODEC_STATELESS_BASE + 7) > > /** > > @@ -2018,6 +2033,290 @@ struct v4l2_ctrl_hdr10_mastering_display { > > __u32 min_display_mastering_luminance; > > }; > > > > +/* Stateless VP9 controls */ > > + > > +#define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED 0x1 > > +#define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE 0x2 > > + > > +/** > > + * struct v4l2_vp9_loop_filter - VP9 loop filter parameters > > + * > > + * @ref_deltas: contains the adjustment needed for the filter level based on the > > + * chosen reference frame. If this syntax element is not present in the bitstream, > > + * users should pass its last value. > > + * @mode_deltas: contains the adjustment needed for the filter level based on the > > + * chosen mode. If this syntax element is not present in the bitstream, users should > > + * pass its last value. > > + * @level: indicates the loop filter strength. > > + * @sharpness: indicates the sharpness level. > > + * @flags: combination of V4L2_VP9_LOOP_FILTER_FLAG_{} flags. > > + * @reserved: padding field. Should be zeroed by applications. > > + * > > + * This structure contains all loop filter related parameters. See sections > > + * '7.2.8 Loop filter semantics' of the VP9 specification for more details. > > + */ > > +struct v4l2_vp9_loop_filter { > > + __s8 ref_deltas[4]; > > + __s8 mode_deltas[2]; > > + __u8 level; > > + __u8 sharpness; > > + __u8 flags; > > + __u8 reserved[7]; > > +}; > > + > > +/** > > + * struct v4l2_vp9_quantization - VP9 quantization parameters > > + * > > + * @base_q_idx: indicates the base frame qindex. > > + * @delta_q_y_dc: indicates the Y DC quantizer relative to base_q_idx. > > + * @delta_q_uv_dc: indicates the UV DC quantizer relative to base_q_idx. > > + * @delta_q_uv_ac: indicates the UV AC quantizer relative to base_q_idx. > > + * @reserved: padding field. Should be zeroed by applications. > > + * > > + * Encodes the quantization parameters. See section '7.2.9 Quantization params > > + * syntax' of the VP9 specification for more details. > > + */ > > +struct v4l2_vp9_quantization { > > + __u8 base_q_idx; > > + __s8 delta_q_y_dc; > > + __s8 delta_q_uv_dc; > > + __s8 delta_q_uv_ac; > > + __u8 reserved[4]; > > +}; > > + > > +#define V4L2_VP9_SEGMENTATION_FLAG_ENABLED 0x01 > > +#define V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP 0x02 > > +#define V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE 0x04 > > +#define V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA 0x08 > > +#define V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE 0x10 > > + > > +#define V4L2_VP9_SEG_LVL_ALT_Q 0 > > +#define V4L2_VP9_SEG_LVL_ALT_L 1 > > +#define V4L2_VP9_SEG_LVL_REF_FRAME 2 > > +#define V4L2_VP9_SEG_LVL_SKIP 3 > > +#define V4L2_VP9_SEG_LVL_MAX 4 > > + > > +#define V4L2_VP9_SEGMENT_FEATURE_ENABLED(id) (1 << (id)) > > +#define V4L2_VP9_SEGMENT_FEATURE_ENABLED_MASK 0xf > > + > > +/** > > + * struct v4l2_vp9_segmentation - VP9 segmentation parameters > > + * > > + * @feature_data: data attached to each feature. Data entry is only valid if > > + * the feature is enabled. The array shall be indexed with segment number as > > + * the first dimension (0..7) and one of V4L2_VP9_SEG_{} as the second dimension. > > + * @feature_enabled: bitmask defining which features are enabled in each segment. > > + * The value for each segment is a combination of V4L2_VP9_SEGMENT_FEATURE_ENABLED(id) > > + * values where id is one of V4L2_VP9_SEG_LVL_{}. > > + * @tree_probs: specifies the probability values to be used when decoding a > > + * Segment-ID. See '5.15. Segmentation map' section of the VP9 specification > > + * for more details. > > + * @pred_probs: specifies the probability values to be used when decoding a > > + * Predicted-Segment-ID. See '6.4.14. Get segment id syntax' section of :ref:`vp9` > > + * for more details. > > + * @flags: combination of V4L2_VP9_SEGMENTATION_FLAG_{} flags. > > + * @reserved: padding field. Should be zeroed by applications. > > + * > > + * Encodes the quantization parameters. See section '7.2.10 Segmentation params syntax' of > > + * the VP9 specification for more details. > > + */ > > +struct v4l2_vp9_segmentation { > > + __s16 feature_data[8][4]; > > + __u8 feature_enabled[8]; > > + __u8 tree_probs[7]; > > + __u8 pred_probs[3]; > > + __u8 flags; > > + __u8 reserved[5]; > > +}; > > + > > +#define V4L2_VP9_FRAME_FLAG_KEY_FRAME 0x001 > > +#define V4L2_VP9_FRAME_FLAG_SHOW_FRAME 0x002 > > +#define V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT 0x004 > > +#define V4L2_VP9_FRAME_FLAG_INTRA_ONLY 0x008 > > +#define V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV 0x010 > > +#define V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX 0x020 > > +#define V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE 0x040 > > +#define V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING 0x080 > > +#define V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING 0x100 > > +#define V4L2_VP9_FRAME_FLAG_COLOR_RANGE_FULL_SWING 0x200 > > + > > +#define V4L2_VP9_SIGN_BIAS_LAST 0x1 > > +#define V4L2_VP9_SIGN_BIAS_GOLDEN 0x2 > > +#define V4L2_VP9_SIGN_BIAS_ALT 0x4 > > + > > +#define V4L2_VP9_RESET_FRAME_CTX_NONE 0 > > +#define V4L2_VP9_RESET_FRAME_CTX_SPEC 1 > > +#define V4L2_VP9_RESET_FRAME_CTX_ALL 2 > > + > > +#define V4L2_VP9_INTERP_FILTER_EIGHTTAP 0 > > +#define V4L2_VP9_INTERP_FILTER_EIGHTTAP_SMOOTH 1 > > +#define V4L2_VP9_INTERP_FILTER_EIGHTTAP_SHARP 2 > > +#define V4L2_VP9_INTERP_FILTER_BILINEAR 3 > > +#define V4L2_VP9_INTERP_FILTER_SWITCHABLE 4 > > + > > +#define V4L2_VP9_REFERENCE_MODE_SINGLE_REFERENCE 0 > > +#define V4L2_VP9_REFERENCE_MODE_COMPOUND_REFERENCE 1 > > +#define V4L2_VP9_REFERENCE_MODE_SELECT 2 > > + > > +#define V4L2_VP9_PROFILE_MAX 3 > > + > > +#define V4L2_CID_STATELESS_VP9_FRAME (V4L2_CID_CODEC_STATELESS_BASE + 300) > > +/** > > + * struct v4l2_ctrl_vp9_frame - VP9 frame decoding control > > + * > > + * @lf: loop filter parameters. See &v4l2_vp9_loop_filter for more details. > > + * @quant: quantization parameters. See &v4l2_vp9_quantization for more details. > > + * @seg: segmentation parameters. See &v4l2_vp9_segmentation for more details. > > + * @flags: combination of V4L2_VP9_FRAME_FLAG_{} flags. > > + * @compressed_header_size: compressed header size in bytes. > > + * @uncompressed_header_size: uncompressed header size in bytes. > > + * @frame_width_minus_1: add 1 to it and you'll get the frame width expressed in pixels. > > + * @frame_height_minus_1: add 1 to it and you'll get the frame height expressed in pixels. > > + * @render_width_minus_1: add 1 to it and you'll get the expected render width expressed in > > + * pixels. This is not used during the decoding process but might be used by HW scalers > > + * to prepare a frame that's ready for scanout. > > + * @render_height_minus_1: add 1 to it and you'll get the expected render height expressed in > > + * pixels. This is not used during the decoding process but might be used by HW scalers > > + * to prepare a frame that's ready for scanout. > > + * @last_frame_ts: "last" reference buffer timestamp. > > + * The timestamp refers to the timestamp field in struct v4l2_buffer. > > + * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64. > > + * @golden_frame_ts: "golden" reference buffer timestamp. > > + * The timestamp refers to the timestamp field in struct v4l2_buffer. > > + * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64. > > + * @alt_frame_ts: "alt" reference buffer timestamp. > > + * The timestamp refers to the timestamp field in struct v4l2_buffer. > > + * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64. > > + * @ref_frame_sign_bias: a bitfield specifying whether the sign bias is set for a given > > + * reference frame. Either of V4L2_VP9_SIGN_BIAS_{}. > > + * @reset_frame_context: specifies whether the frame context should be reset to default values. > > + * Either of V4L2_VP9_RESET_FRAME_CTX_{}. > > + * @frame_context_idx: frame context that should be used/updated. > > + * @profile: VP9 profile. Can be 0, 1, 2 or 3. > > + * @bit_depth: bits per components. Can be 8, 10 or 12. Note that not all profiles support > > + * 10 and/or 12 bits depths. > > + * @interpolation_filter: specifies the filter selection used for performing inter prediction. > > + * Set to one of V4L2_VP9_INTERP_FILTER_{}. > > + * @tile_cols_log2: specifies the base 2 logarithm of the width of each tile (where the width > > + * is measured in units of 8x8 blocks). Shall be less than or equal to 6. > > + * @tile_rows_log2: specifies the base 2 logarithm of the height of each tile (where the height > > + * is measured in units of 8x8 blocks). > > + * @reference_mode: specifies the type of inter prediction to be used. > > + * Set to one of V4L2_VP9_REFERENCE_MODE_{}. > > + * @reserved: padding field. Should be zeroed by applications. > > + */ > > +struct v4l2_ctrl_vp9_frame { > > + struct v4l2_vp9_loop_filter lf; > > + struct v4l2_vp9_quantization quant; > > + struct v4l2_vp9_segmentation seg; > > + __u32 flags; > > + __u16 compressed_header_size; > > + __u16 uncompressed_header_size; > > + __u16 frame_width_minus_1; > > + __u16 frame_height_minus_1; > > + __u16 render_width_minus_1; > > + __u16 render_height_minus_1; > > + __u64 last_frame_ts; > > + __u64 golden_frame_ts; > > + __u64 alt_frame_ts; > > + __u8 ref_frame_sign_bias; > > + __u8 reset_frame_context; > > + __u8 frame_context_idx; > > + __u8 profile; > > + __u8 bit_depth; > > + __u8 interpolation_filter; > > + __u8 tile_cols_log2; > > + __u8 tile_rows_log2; > > + __u8 reference_mode; > > + __u8 reserved[7]; > > +}; > > + > > +#define V4L2_VP9_NUM_FRAME_CTX 4 > > + > > +/** > > + * struct v4l2_vp9_mv_probs - VP9 Motion vector probability updates > > + * @joint: motion vector joint probability updates. > > + * @sign: motion vector sign probability updates. > > + * @classes: motion vector class probability updates. > > + * @class0_bit: motion vector class0 bit probability updates. > > + * @bits: motion vector bits probability updates. > > + * @class0_fr: motion vector class0 fractional bit probability updates. > > + * @fr: motion vector fractional bit probability updates. > > + * @class0_hp: motion vector class0 high precision fractional bit probability updates. > > + * @hp: motion vector high precision fractional bit probability updates. > > + * > > + * This structure contains new values of motion vector probabilities. > > + * A value of zero in an array element means there is no update of the relevant probability. > > + * See `struct v4l2_vp9_prob_updates` for details. > > + */ > > +struct v4l2_vp9_mv_probs { > > + __u8 joint[3]; > > + __u8 sign[2]; > > + __u8 classes[2][10]; > > + __u8 class0_bit[2]; > > + __u8 bits[2][10]; > > + __u8 class0_fr[2][2][3]; > > + __u8 fr[2][3]; > > + __u8 class0_hp[2]; > > + __u8 hp[2]; > > +}; > > + > > +#define V4L2_CID_STATELESS_VP9_COMPRESSED_HDR (V4L2_CID_CODEC_STATELESS_BASE + 301) > > + > > +#define V4L2_VP9_TX_MODE_ONLY_4X4 0 > > +#define V4L2_VP9_TX_MODE_ALLOW_8X8 1 > > +#define V4L2_VP9_TX_MODE_ALLOW_16X16 2 > > +#define V4L2_VP9_TX_MODE_ALLOW_32X32 3 > > +#define V4L2_VP9_TX_MODE_SELECT 4 > > + > > +/** > > + * struct v4l2_ctrl_vp9_compressed_hdr - VP9 probability updates control > > + * @tx_mode: specifies the TX mode. Set to one of V4L2_VP9_TX_MODE_{}. > > + * @tx8: TX 8x8 probability updates. > > + * @tx16: TX 16x16 probability updates. > > + * @tx32: TX 32x32 probability updates. > > + * @coef: coefficient probability updates. > > + * @skip: skip probability updates. > > + * @inter_mode: inter mode probability updates. > > + * @interp_filter: interpolation filter probability updates. > > + * @is_inter: is inter-block probability updates. > > + * @comp_mode: compound prediction mode probability updates. > > + * @single_ref: single ref probability updates. > > + * @comp_ref: compound ref probability updates. > > + * @y_mode: Y prediction mode probability updates. > > + * @uv_mode: UV prediction mode probability updates. > > + * @partition: partition probability updates. > > + * @mv: motion vector probability updates. > > + * > > + * This structure holds the probabilities update as parsed in the compressed > > + * header (Spec 6.3). These values represent the value of probability update after > > + * being translated with inv_map_table[] (see 6.3.5). A value of zero in an array element > > + * means that there is no update of the relevant probability. > > + * > > + * This control is optional and needs to be used when dealing with the hardware which is > > + * not capable of parsing the compressed header itself. Only drivers which need it will > > + * implement it. > > + */ > > +struct v4l2_ctrl_vp9_compressed_hdr { > > + __u8 tx_mode; > > + __u8 tx8[2][1]; > > + __u8 tx16[2][2]; > > + __u8 tx32[2][3]; > > + __u8 coef[4][2][2][6][6][3]; > > + __u8 skip[3]; > > + __u8 inter_mode[7][3]; > > + __u8 interp_filter[4][2]; > > + __u8 is_inter[4]; > > + __u8 comp_mode[5]; > > + __u8 single_ref[5][2]; > > + __u8 comp_ref[5]; > > + __u8 y_mode[4][9]; > > + __u8 uv_mode[10][9]; > > + __u8 partition[16][3]; > > + > > + struct v4l2_vp9_mv_probs mv; > > +}; > > + > > /* MPEG-compression definitions kept for backwards compatibility */ > > #define V4L2_CTRL_CLASS_MPEG V4L2_CTRL_CLASS_CODEC > > #define V4L2_CID_MPEG_CLASS V4L2_CID_CODEC_CLASS > > diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h > > index dcc0b01dfa9a..6e3d58e5a5c4 100644 > > --- a/include/linux/videodev2.h > > +++ b/include/linux/videodev2.h > > @@ -563,6 +563,7 @@ struct v4l2_pix_format { > > /* Grey bit-packed formats */ > > #define V4L2_PIX_FMT_Y10BPACK v4l2_fourcc('Y', '1', '0', 'B') /* 10 Greyscale bit-packed */ > > #define V4L2_PIX_FMT_Y10P v4l2_fourcc('Y', '1', '0', 'P') /* 10 Greyscale, MIPI RAW10 packed */ > > +#define V4L2_PIX_FMT_IPU3_Y10 v4l2_fourcc('i', 'p', '3', 'y') /* IPU3 packed 10-bit greyscale */ > > > > /* Palette formats */ > > #define V4L2_PIX_FMT_PAL8 v4l2_fourcc('P', 'A', 'L', '8') /* 8 8-bit palette */ > > @@ -626,6 +627,8 @@ struct v4l2_pix_format { > > /* Tiled YUV formats, non contiguous planes */ > > #define V4L2_PIX_FMT_NV12MT v4l2_fourcc('T', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 64x32 tiles */ > > #define V4L2_PIX_FMT_NV12MT_16X16 v4l2_fourcc('V', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 16x16 tiles */ > > +#define V4L2_PIX_FMT_NV12M_8L128 v4l2_fourcc('N', 'A', '1', '2') /* Y/CbCr 4:2:0 8x128 tiles */ > > +#define V4L2_PIX_FMT_NV12M_10BE_8L128 v4l2_fourcc_be('N', 'T', '1', '2') /* Y/CbCr 4:2:0 10-bit 8x128 tiles */ > > > > /* Bayer formats - see http://www.siliconimaging.com/RGB%20Bayer.htm */ > > #define V4L2_PIX_FMT_SBGGR8 v4l2_fourcc('B', 'A', '8', '1') /* 8 BGBG.. GRGR.. */ > > @@ -697,6 +700,7 @@ struct v4l2_pix_format { > > #define V4L2_PIX_FMT_VP8 v4l2_fourcc('V', 'P', '8', '0') /* VP8 */ > > #define V4L2_PIX_FMT_VP8_FRAME v4l2_fourcc('V', 'P', '8', 'F') /* VP8 parsed frame */ > > #define V4L2_PIX_FMT_VP9 v4l2_fourcc('V', 'P', '9', '0') /* VP9 */ > > +#define V4L2_PIX_FMT_VP9_FRAME v4l2_fourcc('V', 'P', '9', 'F') /* VP9 parsed frame */ > > #define V4L2_PIX_FMT_HEVC v4l2_fourcc('H', 'E', 'V', 'C') /* HEVC aka H.265 */ > > #define V4L2_PIX_FMT_FWHT v4l2_fourcc('F', 'W', 'H', 'T') /* Fast Walsh Hadamard Transform (vicodec) */ > > #define V4L2_PIX_FMT_FWHT_STATELESS v4l2_fourcc('S', 'F', 'W', 'H') /* Stateless FWHT (vicodec) */ > > @@ -737,8 +741,10 @@ struct v4l2_pix_format { > > #define V4L2_PIX_FMT_INZI v4l2_fourcc('I', 'N', 'Z', 'I') /* Intel Planar Greyscale 10-bit and Depth 16-bit */ > > #define V4L2_PIX_FMT_CNF4 v4l2_fourcc('C', 'N', 'F', '4') /* Intel 4-bit packed depth confidence information */ > > #define V4L2_PIX_FMT_HI240 v4l2_fourcc('H', 'I', '2', '4') /* BTTV 8-bit dithered RGB */ > > +#define V4L2_PIX_FMT_QC08C v4l2_fourcc('Q', '0', '8', 'C') /* Qualcomm 8-bit compressed */ > > +#define V4L2_PIX_FMT_QC10C v4l2_fourcc('Q', '1', '0', 'C') /* Qualcomm 10-bit compressed */ > > > > -/* 10bit raw bayer packed, 32 bytes for every 25 pixels, last LSB 6 bits unused */ > > +/* 10bit raw packed, 32 bytes for every 25 pixels, last LSB 6 bits unused */ > > #define V4L2_PIX_FMT_IPU3_SBGGR10 v4l2_fourcc('i', 'p', '3', 'b') /* IPU3 packed 10-bit BGGR bayer */ > > #define V4L2_PIX_FMT_IPU3_SGBRG10 v4l2_fourcc('i', 'p', '3', 'g') /* IPU3 packed 10-bit GBRG bayer */ > > #define V4L2_PIX_FMT_IPU3_SGRBG10 v4l2_fourcc('i', 'p', '3', 'G') /* IPU3 packed 10-bit GRBG bayer */ > > @@ -1732,6 +1738,8 @@ struct v4l2_ext_control { > > struct v4l2_ctrl_mpeg2_sequence *p_mpeg2_sequence; > > struct v4l2_ctrl_mpeg2_picture *p_mpeg2_picture; > > struct v4l2_ctrl_mpeg2_quantisation *p_mpeg2_quantisation; > > + struct v4l2_ctrl_vp9_compressed_hdr *p_vp9_compressed_hdr_probs; > > + struct v4l2_ctrl_vp9_frame *p_vp9_frame; > > void *ptr; > > }; > > } __attribute__ ((packed)); > > @@ -1792,6 +1800,9 @@ enum v4l2_ctrl_type { > > V4L2_CTRL_TYPE_MPEG2_QUANTISATION = 0x0250, > > V4L2_CTRL_TYPE_MPEG2_SEQUENCE = 0x0251, > > V4L2_CTRL_TYPE_MPEG2_PICTURE = 0x0252, > > + > > + V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR = 0x0260, > > + V4L2_CTRL_TYPE_VP9_FRAME = 0x0261, > > }; > > > > /* Used in the VIDIOC_QUERYCTRL ioctl for querying controls */
Ups, forgot Reviewed-by: Jacopo Mondi <jacopo@jmondi.org> Checked that the local changes applied on the previous v5.16-rc7 version are still there On Mon, Aug 01, 2022 at 10:47:04PM +0300, Laurent Pinchart wrote: > Hi Jacopo, > > On Mon, Aug 01, 2022 at 05:16:29PM +0200, Jacopo Mondi wrote: > > On Mon, Aug 01, 2022 at 03:05:31AM +0300, Laurent Pinchart via libcamera-devel wrote: > > > Update kernel headers to v5.19 using utils/update-kernel-headers.sh and > > > re-instating libcamera local modifications. > > > > Don't we need something better than this ? > > > > should we regularly rebase the libcamera-changes on top of a new > > header export per each kernel release ? > > > > Otherwise updating headers and re-applying the local modifications in > > one go makes it impossible to actually track what's local and what's > > upstream ? > > This patch was possibly easier to generate than it is to review. The > update-kernel-headers.sh script undoes all the local changes, and I've > then used git add -p to avoid picking up the reverts. This is a manual > process that can lead to errors. > > On the review side, it's really about making sure that the update > doesn't drop any of the features we depend on. It may seem error-prone > too, but most (not all though) of the local changes we carry will be > detected at compilation time of reverted. > > The best way to avoid all this is of course to upstream all the changes, > and that's something we keep working on, with various delays depending > on the features. For instance, patches 02/13 and 03/13 in this series > will effectively disappear once we upgrade to the v5.20 kernel headers. > Other changes take longer to upstream. > > I'm open to other ideas to improve the process, but completely > overwriting the headers and then reapplying local changes on top will > break compilation during bisection. > > > > Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > > > --- > > > include/linux/README | 2 +- > > > include/linux/dma-buf.h | 4 +- > > > include/linux/drm_fourcc.h | 86 +++++++++- > > > include/linux/intel-ipu3.h | 35 ++-- > > > include/linux/v4l2-controls.h | 301 +++++++++++++++++++++++++++++++++- > > > include/linux/videodev2.h | 13 +- > > > 6 files changed, 418 insertions(+), 23 deletions(-) > > > > > > diff --git a/include/linux/README b/include/linux/README > > > index 4e314b9820ce..9f61517a119a 100644 > > > --- a/include/linux/README > > > +++ b/include/linux/README > > > @@ -1,4 +1,4 @@ > > > # SPDX-License-Identifier: CC0-1.0 > > > > > > -Files in this directory are imported from v5.16-rc7 of the Linux kernel. Do not > > > +Files in this directory are imported from v5.19 of the Linux kernel. Do not > > > modify them manually. > > > diff --git a/include/linux/dma-buf.h b/include/linux/dma-buf.h > > > index 8e4a2ca0bcbf..b1523cb8ab30 100644 > > > --- a/include/linux/dma-buf.h > > > +++ b/include/linux/dma-buf.h > > > @@ -92,7 +92,7 @@ struct dma_buf_sync { > > > * between them in actual uapi, they're just different numbers. > > > */ > > > #define DMA_BUF_SET_NAME _IOW(DMA_BUF_BASE, 1, const char *) > > > -#define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, u32) > > > -#define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, u64) > > > +#define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, __u32) > > > +#define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, __u64) > > > > > > #endif > > > diff --git a/include/linux/drm_fourcc.h b/include/linux/drm_fourcc.h > > > index ea11dcb405e5..cc69eecc606f 100644 > > > --- a/include/linux/drm_fourcc.h > > > +++ b/include/linux/drm_fourcc.h > > > @@ -314,6 +314,13 @@ extern "C" { > > > */ > > > #define DRM_FORMAT_P016 fourcc_code('P', '0', '1', '6') /* 2x2 subsampled Cr:Cb plane 16 bits per channel */ > > > > > > +/* 2 plane YCbCr420. > > > + * 3 10 bit components and 2 padding bits packed into 4 bytes. > > > + * index 0 = Y plane, [31:0] x:Y2:Y1:Y0 2:10:10:10 little endian > > > + * index 1 = Cr:Cb plane, [63:0] x:Cr2:Cb2:Cr1:x:Cb1:Cr0:Cb0 [2:10:10:10:2:10:10:10] little endian > > > + */ > > > +#define DRM_FORMAT_P030 fourcc_code('P', '0', '3', '0') /* 2x2 subsampled Cr:Cb plane 10 bits per channel packed */ > > > + > > > /* 3 plane non-subsampled (444) YCbCr > > > * 16 bits per component, but only 10 bits are used and 6 bits are padded > > > * index 0: Y plane, [15:0] Y:x [10:6] little endian > > > @@ -630,6 +637,53 @@ extern "C" { > > > */ > > > #define I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC fourcc_mod_code(INTEL, 8) > > > > > > +/* > > > + * Intel Tile 4 layout > > > + * > > > + * This is a tiled layout using 4KB tiles in a row-major layout. It has the same > > > + * shape as Tile Y at two granularities: 4KB (128B x 32) and 64B (16B x 4). It > > > + * only differs from Tile Y at the 256B granularity in between. At this > > > + * granularity, Tile Y has a shape of 16B x 32 rows, but this tiling has a shape > > > + * of 64B x 8 rows. > > > + */ > > > +#define I915_FORMAT_MOD_4_TILED fourcc_mod_code(INTEL, 9) > > > + > > > +/* > > > + * Intel color control surfaces (CCS) for DG2 render compression. > > > + * > > > + * The main surface is Tile 4 and at plane index 0. The CCS data is stored > > > + * outside of the GEM object in a reserved memory area dedicated for the > > > + * storage of the CCS data for all RC/RC_CC/MC compressible GEM objects. The > > > + * main surface pitch is required to be a multiple of four Tile 4 widths. > > > + */ > > > +#define I915_FORMAT_MOD_4_TILED_DG2_RC_CCS fourcc_mod_code(INTEL, 10) > > > + > > > +/* > > > + * Intel color control surfaces (CCS) for DG2 media compression. > > > + * > > > + * The main surface is Tile 4 and at plane index 0. For semi-planar formats > > > + * like NV12, the Y and UV planes are Tile 4 and are located at plane indices > > > + * 0 and 1, respectively. The CCS for all planes are stored outside of the > > > + * GEM object in a reserved memory area dedicated for the storage of the > > > + * CCS data for all RC/RC_CC/MC compressible GEM objects. The main surface > > > + * pitch is required to be a multiple of four Tile 4 widths. > > > + */ > > > +#define I915_FORMAT_MOD_4_TILED_DG2_MC_CCS fourcc_mod_code(INTEL, 11) > > > + > > > +/* > > > + * Intel Color Control Surface with Clear Color (CCS) for DG2 render compression. > > > + * > > > + * The main surface is Tile 4 and at plane index 0. The CCS data is stored > > > + * outside of the GEM object in a reserved memory area dedicated for the > > > + * storage of the CCS data for all RC/RC_CC/MC compressible GEM objects. The > > > + * main surface pitch is required to be a multiple of four Tile 4 widths. The > > > + * clear color is stored at plane index 1 and the pitch should be ignored. The > > > + * format of the 256 bits of clear color data matches the one used for the > > > + * I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC modifier, see its description > > > + * for details. > > > + */ > > > +#define I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC fourcc_mod_code(INTEL, 12) > > > + > > > /* > > > * IPU3 Bayer packing layout > > > * > > > @@ -638,7 +692,7 @@ extern "C" { > > > * the 6 most significant bits in the last byte unused. The format is little > > > * endian. > > > */ > > > -#define IPU3_FORMAT_MOD_PACKED fourcc_mod_code(INTEL, 9) > > > +#define IPU3_FORMAT_MOD_PACKED fourcc_mod_code(INTEL, 13) > > > > > > /* > > > * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks > > > @@ -677,6 +731,28 @@ extern "C" { > > > */ > > > #define DRM_FORMAT_MOD_QCOM_COMPRESSED fourcc_mod_code(QCOM, 1) > > > > > > +/* > > > + * Qualcomm Tiled Format > > > + * > > > + * Similar to DRM_FORMAT_MOD_QCOM_COMPRESSED but not compressed. > > > + * Implementation may be platform and base-format specific. > > > + * > > > + * Each macrotile consists of m x n (mostly 4 x 4) tiles. > > > + * Pixel data pitch/stride is aligned with macrotile width. > > > + * Pixel data height is aligned with macrotile height. > > > + * Entire pixel data buffer is aligned with 4k(bytes). > > > + */ > > > +#define DRM_FORMAT_MOD_QCOM_TILED3 fourcc_mod_code(QCOM, 3) > > > + > > > +/* > > > + * Qualcomm Alternate Tiled Format > > > + * > > > + * Alternate tiled format typically only used within GMEM. > > > + * Implementation may be platform and base-format specific. > > > + */ > > > +#define DRM_FORMAT_MOD_QCOM_TILED2 fourcc_mod_code(QCOM, 2) > > > + > > > + > > > /* Vivante framebuffer modifiers */ > > > > > > /* > > > @@ -929,6 +1005,10 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) > > > * and UV. Some SAND-using hardware stores UV in a separate tiled > > > * image from Y to reduce the column height, which is not supported > > > * with these modifiers. > > > + * > > > + * The DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT modifier is also > > > + * supported for DRM_FORMAT_P030 where the columns remain as 128 bytes > > > + * wide, but as this is a 10 bpp format that translates to 96 pixels. > > > */ > > > > > > #define DRM_FORMAT_MOD_BROADCOM_SAND32_COL_HEIGHT(v) \ > > > @@ -1439,11 +1519,11 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) > > > #define AMD_FMT_MOD_PIPE_MASK 0x7 > > > > > > #define AMD_FMT_MOD_SET(field, value) \ > > > - ((uint64_t)(value) << AMD_FMT_MOD_##field##_SHIFT) > > > + ((__u64)(value) << AMD_FMT_MOD_##field##_SHIFT) > > > #define AMD_FMT_MOD_GET(field, value) \ > > > (((value) >> AMD_FMT_MOD_##field##_SHIFT) & AMD_FMT_MOD_##field##_MASK) > > > #define AMD_FMT_MOD_CLEAR(field) \ > > > - (~((uint64_t)AMD_FMT_MOD_##field##_MASK << AMD_FMT_MOD_##field##_SHIFT)) > > > + (~((__u64)AMD_FMT_MOD_##field##_MASK << AMD_FMT_MOD_##field##_SHIFT)) > > > > > > /* Mobile Industry Processor Interface (MIPI) modifiers */ > > > > > > diff --git a/include/linux/intel-ipu3.h b/include/linux/intel-ipu3.h > > > index f30dce43d1d8..5c298ec557fa 100644 > > > --- a/include/linux/intel-ipu3.h > > > +++ b/include/linux/intel-ipu3.h > > > @@ -34,11 +34,17 @@ > > > * struct ipu3_uapi_grid_config - Grid plane config > > > * > > > * @width: Grid horizontal dimensions, in number of grid blocks(cells). > > > + * For AWB, the range is (16, 80). > > > + * For AF/AE, the range is (16, 32). > > > * @height: Grid vertical dimensions, in number of grid cells. > > > + * For AWB, the range is (16, 60). > > > + * For AF/AE, the range is (16, 24). > > > * @block_width_log2: Log2 of the width of each cell in pixels. > > > - * for (2^3, 2^4, 2^5, 2^6, 2^7), values [3, 7]. > > > + * For AWB, the range is [3, 6]. > > > + * For AF/AE, the range is [3, 7]. > > > * @block_height_log2: Log2 of the height of each cell in pixels. > > > - * for (2^3, 2^4, 2^5, 2^6, 2^7), values [3, 7]. > > > + * For AWB, the range is [3, 6]. > > > + * For AF/AE, the range is [3, 7]. > > > * @height_per_slice: The number of blocks in vertical axis per slice. > > > * Default 2. > > > * @x_start: X value of top left corner of Region of Interest(ROI). > > > @@ -68,21 +74,21 @@ struct ipu3_uapi_grid_config { > > > * @R_avg: Red average in the cell. > > > * @B_avg: Blue average in the cell. > > > * @Gb_avg: Green average for blue lines in the cell. > > > - * @sat_ratio: Percentage of pixels over a given threshold set in > > > + * @sat_ratio: Percentage of pixels over the thresholds specified in > > > * ipu3_uapi_awb_config_s, coded from 0 to 255. > > > - * @padding0: Unused byte for padding. > > > - * @padding1: Unused byte for padding. > > > - * @padding2: Unused byte for padding. > > > + * @padding0: Unused byte for padding. > > > + * @padding1: Unused byte for padding. > > > + * @padding2: Unused byte for padding. > > > */ > > > struct ipu3_uapi_awb_set_item { > > > - unsigned char Gr_avg; > > > - unsigned char R_avg; > > > - unsigned char B_avg; > > > - unsigned char Gb_avg; > > > - unsigned char sat_ratio; > > > - unsigned char padding0; > > > - unsigned char padding1; > > > - unsigned char padding2; > > > + __u8 Gr_avg; > > > + __u8 R_avg; > > > + __u8 B_avg; > > > + __u8 Gb_avg; > > > + __u8 sat_ratio; > > > + __u8 padding0; > > > + __u8 padding1; > > > + __u8 padding2; > > > } __attribute__((packed)); > > > > > > /* > > > @@ -98,7 +104,6 @@ struct ipu3_uapi_awb_set_item { > > > (IPU3_UAPI_AWB_MAX_SETS * \ > > > (IPU3_UAPI_AWB_SET_SIZE + IPU3_UAPI_AWB_SPARE_FOR_BUBBLES)) > > > > > > - > > > /** > > > * struct ipu3_uapi_awb_raw_buffer - AWB raw buffer > > > * > > > diff --git a/include/linux/v4l2-controls.h b/include/linux/v4l2-controls.h > > > index a055d2576253..9d2a8237e712 100644 > > > --- a/include/linux/v4l2-controls.h > > > +++ b/include/linux/v4l2-controls.h > > > @@ -128,6 +128,7 @@ enum v4l2_colorfx { > > > V4L2_COLORFX_SOLARIZATION = 13, > > > V4L2_COLORFX_ANTIQUE = 14, > > > V4L2_COLORFX_SET_CBCR = 15, > > > + V4L2_COLORFX_SET_RGB = 16, > > > }; > > > #define V4L2_CID_AUTOBRIGHTNESS (V4L2_CID_BASE+32) > > > #define V4L2_CID_BAND_STOP_FILTER (V4L2_CID_BASE+33) > > > @@ -145,9 +146,10 @@ enum v4l2_colorfx { > > > > > > #define V4L2_CID_ALPHA_COMPONENT (V4L2_CID_BASE+41) > > > #define V4L2_CID_COLORFX_CBCR (V4L2_CID_BASE+42) > > > +#define V4L2_CID_COLORFX_RGB (V4L2_CID_BASE+43) > > > > > > /* last CID + 1 */ > > > -#define V4L2_CID_LASTP1 (V4L2_CID_BASE+43) > > > +#define V4L2_CID_LASTP1 (V4L2_CID_BASE+44) > > > > > > /* USER-class private control IDs */ > > > > > > @@ -221,6 +223,12 @@ enum v4l2_colorfx { > > > */ > > > #define V4L2_CID_USER_ALLEGRO_BASE (V4L2_CID_USER_BASE + 0x1170) > > > > > > +/* > > > + * The base for the isl7998x driver controls. > > > + * We reserve 16 controls for this driver. > > > + */ > > > +#define V4L2_CID_USER_ISL7998X_BASE (V4L2_CID_USER_BASE + 0x1180) > > > + > > > /* MPEG-class control IDs */ > > > /* The MPEG controls are applicable to all codec controls > > > * and the 'MPEG' part of the define is historical */ > > > @@ -443,6 +451,11 @@ enum v4l2_mpeg_video_multi_slice_mode { > > > #define V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES (V4L2_CID_CODEC_BASE+234) > > > #define V4L2_CID_MPEG_VIDEO_DEC_CONCEAL_COLOR (V4L2_CID_CODEC_BASE+235) > > > #define V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD (V4L2_CID_CODEC_BASE+236) > > > +#define V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE (V4L2_CID_CODEC_BASE+237) > > > +enum v4l2_mpeg_video_intra_refresh_period_type { > > > + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM = 0, > > > + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC = 1, > > > +}; > > > > > > /* CIDs for the MPEG-2 Part 2 (H.262) codec */ > > > #define V4L2_CID_MPEG_VIDEO_MPEG2_LEVEL (V4L2_CID_CODEC_BASE+270) > > > @@ -1563,6 +1576,8 @@ struct v4l2_h264_dpb_entry { > > > #define V4L2_H264_DECODE_PARAM_FLAG_IDR_PIC 0x01 > > > #define V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC 0x02 > > > #define V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD 0x04 > > > +#define V4L2_H264_DECODE_PARAM_FLAG_PFRAME 0x08 > > > +#define V4L2_H264_DECODE_PARAM_FLAG_BFRAME 0x10 > > > > > > #define V4L2_CID_STATELESS_H264_DECODE_PARAMS (V4L2_CID_CODEC_STATELESS_BASE + 7) > > > /** > > > @@ -2018,6 +2033,290 @@ struct v4l2_ctrl_hdr10_mastering_display { > > > __u32 min_display_mastering_luminance; > > > }; > > > > > > +/* Stateless VP9 controls */ > > > + > > > +#define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED 0x1 > > > +#define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE 0x2 > > > + > > > +/** > > > + * struct v4l2_vp9_loop_filter - VP9 loop filter parameters > > > + * > > > + * @ref_deltas: contains the adjustment needed for the filter level based on the > > > + * chosen reference frame. If this syntax element is not present in the bitstream, > > > + * users should pass its last value. > > > + * @mode_deltas: contains the adjustment needed for the filter level based on the > > > + * chosen mode. If this syntax element is not present in the bitstream, users should > > > + * pass its last value. > > > + * @level: indicates the loop filter strength. > > > + * @sharpness: indicates the sharpness level. > > > + * @flags: combination of V4L2_VP9_LOOP_FILTER_FLAG_{} flags. > > > + * @reserved: padding field. Should be zeroed by applications. > > > + * > > > + * This structure contains all loop filter related parameters. See sections > > > + * '7.2.8 Loop filter semantics' of the VP9 specification for more details. > > > + */ > > > +struct v4l2_vp9_loop_filter { > > > + __s8 ref_deltas[4]; > > > + __s8 mode_deltas[2]; > > > + __u8 level; > > > + __u8 sharpness; > > > + __u8 flags; > > > + __u8 reserved[7]; > > > +}; > > > + > > > +/** > > > + * struct v4l2_vp9_quantization - VP9 quantization parameters > > > + * > > > + * @base_q_idx: indicates the base frame qindex. > > > + * @delta_q_y_dc: indicates the Y DC quantizer relative to base_q_idx. > > > + * @delta_q_uv_dc: indicates the UV DC quantizer relative to base_q_idx. > > > + * @delta_q_uv_ac: indicates the UV AC quantizer relative to base_q_idx. > > > + * @reserved: padding field. Should be zeroed by applications. > > > + * > > > + * Encodes the quantization parameters. See section '7.2.9 Quantization params > > > + * syntax' of the VP9 specification for more details. > > > + */ > > > +struct v4l2_vp9_quantization { > > > + __u8 base_q_idx; > > > + __s8 delta_q_y_dc; > > > + __s8 delta_q_uv_dc; > > > + __s8 delta_q_uv_ac; > > > + __u8 reserved[4]; > > > +}; > > > + > > > +#define V4L2_VP9_SEGMENTATION_FLAG_ENABLED 0x01 > > > +#define V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP 0x02 > > > +#define V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE 0x04 > > > +#define V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA 0x08 > > > +#define V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE 0x10 > > > + > > > +#define V4L2_VP9_SEG_LVL_ALT_Q 0 > > > +#define V4L2_VP9_SEG_LVL_ALT_L 1 > > > +#define V4L2_VP9_SEG_LVL_REF_FRAME 2 > > > +#define V4L2_VP9_SEG_LVL_SKIP 3 > > > +#define V4L2_VP9_SEG_LVL_MAX 4 > > > + > > > +#define V4L2_VP9_SEGMENT_FEATURE_ENABLED(id) (1 << (id)) > > > +#define V4L2_VP9_SEGMENT_FEATURE_ENABLED_MASK 0xf > > > + > > > +/** > > > + * struct v4l2_vp9_segmentation - VP9 segmentation parameters > > > + * > > > + * @feature_data: data attached to each feature. Data entry is only valid if > > > + * the feature is enabled. The array shall be indexed with segment number as > > > + * the first dimension (0..7) and one of V4L2_VP9_SEG_{} as the second dimension. > > > + * @feature_enabled: bitmask defining which features are enabled in each segment. > > > + * The value for each segment is a combination of V4L2_VP9_SEGMENT_FEATURE_ENABLED(id) > > > + * values where id is one of V4L2_VP9_SEG_LVL_{}. > > > + * @tree_probs: specifies the probability values to be used when decoding a > > > + * Segment-ID. See '5.15. Segmentation map' section of the VP9 specification > > > + * for more details. > > > + * @pred_probs: specifies the probability values to be used when decoding a > > > + * Predicted-Segment-ID. See '6.4.14. Get segment id syntax' section of :ref:`vp9` > > > + * for more details. > > > + * @flags: combination of V4L2_VP9_SEGMENTATION_FLAG_{} flags. > > > + * @reserved: padding field. Should be zeroed by applications. > > > + * > > > + * Encodes the quantization parameters. See section '7.2.10 Segmentation params syntax' of > > > + * the VP9 specification for more details. > > > + */ > > > +struct v4l2_vp9_segmentation { > > > + __s16 feature_data[8][4]; > > > + __u8 feature_enabled[8]; > > > + __u8 tree_probs[7]; > > > + __u8 pred_probs[3]; > > > + __u8 flags; > > > + __u8 reserved[5]; > > > +}; > > > + > > > +#define V4L2_VP9_FRAME_FLAG_KEY_FRAME 0x001 > > > +#define V4L2_VP9_FRAME_FLAG_SHOW_FRAME 0x002 > > > +#define V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT 0x004 > > > +#define V4L2_VP9_FRAME_FLAG_INTRA_ONLY 0x008 > > > +#define V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV 0x010 > > > +#define V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX 0x020 > > > +#define V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE 0x040 > > > +#define V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING 0x080 > > > +#define V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING 0x100 > > > +#define V4L2_VP9_FRAME_FLAG_COLOR_RANGE_FULL_SWING 0x200 > > > + > > > +#define V4L2_VP9_SIGN_BIAS_LAST 0x1 > > > +#define V4L2_VP9_SIGN_BIAS_GOLDEN 0x2 > > > +#define V4L2_VP9_SIGN_BIAS_ALT 0x4 > > > + > > > +#define V4L2_VP9_RESET_FRAME_CTX_NONE 0 > > > +#define V4L2_VP9_RESET_FRAME_CTX_SPEC 1 > > > +#define V4L2_VP9_RESET_FRAME_CTX_ALL 2 > > > + > > > +#define V4L2_VP9_INTERP_FILTER_EIGHTTAP 0 > > > +#define V4L2_VP9_INTERP_FILTER_EIGHTTAP_SMOOTH 1 > > > +#define V4L2_VP9_INTERP_FILTER_EIGHTTAP_SHARP 2 > > > +#define V4L2_VP9_INTERP_FILTER_BILINEAR 3 > > > +#define V4L2_VP9_INTERP_FILTER_SWITCHABLE 4 > > > + > > > +#define V4L2_VP9_REFERENCE_MODE_SINGLE_REFERENCE 0 > > > +#define V4L2_VP9_REFERENCE_MODE_COMPOUND_REFERENCE 1 > > > +#define V4L2_VP9_REFERENCE_MODE_SELECT 2 > > > + > > > +#define V4L2_VP9_PROFILE_MAX 3 > > > + > > > +#define V4L2_CID_STATELESS_VP9_FRAME (V4L2_CID_CODEC_STATELESS_BASE + 300) > > > +/** > > > + * struct v4l2_ctrl_vp9_frame - VP9 frame decoding control > > > + * > > > + * @lf: loop filter parameters. See &v4l2_vp9_loop_filter for more details. > > > + * @quant: quantization parameters. See &v4l2_vp9_quantization for more details. > > > + * @seg: segmentation parameters. See &v4l2_vp9_segmentation for more details. > > > + * @flags: combination of V4L2_VP9_FRAME_FLAG_{} flags. > > > + * @compressed_header_size: compressed header size in bytes. > > > + * @uncompressed_header_size: uncompressed header size in bytes. > > > + * @frame_width_minus_1: add 1 to it and you'll get the frame width expressed in pixels. > > > + * @frame_height_minus_1: add 1 to it and you'll get the frame height expressed in pixels. > > > + * @render_width_minus_1: add 1 to it and you'll get the expected render width expressed in > > > + * pixels. This is not used during the decoding process but might be used by HW scalers > > > + * to prepare a frame that's ready for scanout. > > > + * @render_height_minus_1: add 1 to it and you'll get the expected render height expressed in > > > + * pixels. This is not used during the decoding process but might be used by HW scalers > > > + * to prepare a frame that's ready for scanout. > > > + * @last_frame_ts: "last" reference buffer timestamp. > > > + * The timestamp refers to the timestamp field in struct v4l2_buffer. > > > + * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64. > > > + * @golden_frame_ts: "golden" reference buffer timestamp. > > > + * The timestamp refers to the timestamp field in struct v4l2_buffer. > > > + * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64. > > > + * @alt_frame_ts: "alt" reference buffer timestamp. > > > + * The timestamp refers to the timestamp field in struct v4l2_buffer. > > > + * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64. > > > + * @ref_frame_sign_bias: a bitfield specifying whether the sign bias is set for a given > > > + * reference frame. Either of V4L2_VP9_SIGN_BIAS_{}. > > > + * @reset_frame_context: specifies whether the frame context should be reset to default values. > > > + * Either of V4L2_VP9_RESET_FRAME_CTX_{}. > > > + * @frame_context_idx: frame context that should be used/updated. > > > + * @profile: VP9 profile. Can be 0, 1, 2 or 3. > > > + * @bit_depth: bits per components. Can be 8, 10 or 12. Note that not all profiles support > > > + * 10 and/or 12 bits depths. > > > + * @interpolation_filter: specifies the filter selection used for performing inter prediction. > > > + * Set to one of V4L2_VP9_INTERP_FILTER_{}. > > > + * @tile_cols_log2: specifies the base 2 logarithm of the width of each tile (where the width > > > + * is measured in units of 8x8 blocks). Shall be less than or equal to 6. > > > + * @tile_rows_log2: specifies the base 2 logarithm of the height of each tile (where the height > > > + * is measured in units of 8x8 blocks). > > > + * @reference_mode: specifies the type of inter prediction to be used. > > > + * Set to one of V4L2_VP9_REFERENCE_MODE_{}. > > > + * @reserved: padding field. Should be zeroed by applications. > > > + */ > > > +struct v4l2_ctrl_vp9_frame { > > > + struct v4l2_vp9_loop_filter lf; > > > + struct v4l2_vp9_quantization quant; > > > + struct v4l2_vp9_segmentation seg; > > > + __u32 flags; > > > + __u16 compressed_header_size; > > > + __u16 uncompressed_header_size; > > > + __u16 frame_width_minus_1; > > > + __u16 frame_height_minus_1; > > > + __u16 render_width_minus_1; > > > + __u16 render_height_minus_1; > > > + __u64 last_frame_ts; > > > + __u64 golden_frame_ts; > > > + __u64 alt_frame_ts; > > > + __u8 ref_frame_sign_bias; > > > + __u8 reset_frame_context; > > > + __u8 frame_context_idx; > > > + __u8 profile; > > > + __u8 bit_depth; > > > + __u8 interpolation_filter; > > > + __u8 tile_cols_log2; > > > + __u8 tile_rows_log2; > > > + __u8 reference_mode; > > > + __u8 reserved[7]; > > > +}; > > > + > > > +#define V4L2_VP9_NUM_FRAME_CTX 4 > > > + > > > +/** > > > + * struct v4l2_vp9_mv_probs - VP9 Motion vector probability updates > > > + * @joint: motion vector joint probability updates. > > > + * @sign: motion vector sign probability updates. > > > + * @classes: motion vector class probability updates. > > > + * @class0_bit: motion vector class0 bit probability updates. > > > + * @bits: motion vector bits probability updates. > > > + * @class0_fr: motion vector class0 fractional bit probability updates. > > > + * @fr: motion vector fractional bit probability updates. > > > + * @class0_hp: motion vector class0 high precision fractional bit probability updates. > > > + * @hp: motion vector high precision fractional bit probability updates. > > > + * > > > + * This structure contains new values of motion vector probabilities. > > > + * A value of zero in an array element means there is no update of the relevant probability. > > > + * See `struct v4l2_vp9_prob_updates` for details. > > > + */ > > > +struct v4l2_vp9_mv_probs { > > > + __u8 joint[3]; > > > + __u8 sign[2]; > > > + __u8 classes[2][10]; > > > + __u8 class0_bit[2]; > > > + __u8 bits[2][10]; > > > + __u8 class0_fr[2][2][3]; > > > + __u8 fr[2][3]; > > > + __u8 class0_hp[2]; > > > + __u8 hp[2]; > > > +}; > > > + > > > +#define V4L2_CID_STATELESS_VP9_COMPRESSED_HDR (V4L2_CID_CODEC_STATELESS_BASE + 301) > > > + > > > +#define V4L2_VP9_TX_MODE_ONLY_4X4 0 > > > +#define V4L2_VP9_TX_MODE_ALLOW_8X8 1 > > > +#define V4L2_VP9_TX_MODE_ALLOW_16X16 2 > > > +#define V4L2_VP9_TX_MODE_ALLOW_32X32 3 > > > +#define V4L2_VP9_TX_MODE_SELECT 4 > > > + > > > +/** > > > + * struct v4l2_ctrl_vp9_compressed_hdr - VP9 probability updates control > > > + * @tx_mode: specifies the TX mode. Set to one of V4L2_VP9_TX_MODE_{}. > > > + * @tx8: TX 8x8 probability updates. > > > + * @tx16: TX 16x16 probability updates. > > > + * @tx32: TX 32x32 probability updates. > > > + * @coef: coefficient probability updates. > > > + * @skip: skip probability updates. > > > + * @inter_mode: inter mode probability updates. > > > + * @interp_filter: interpolation filter probability updates. > > > + * @is_inter: is inter-block probability updates. > > > + * @comp_mode: compound prediction mode probability updates. > > > + * @single_ref: single ref probability updates. > > > + * @comp_ref: compound ref probability updates. > > > + * @y_mode: Y prediction mode probability updates. > > > + * @uv_mode: UV prediction mode probability updates. > > > + * @partition: partition probability updates. > > > + * @mv: motion vector probability updates. > > > + * > > > + * This structure holds the probabilities update as parsed in the compressed > > > + * header (Spec 6.3). These values represent the value of probability update after > > > + * being translated with inv_map_table[] (see 6.3.5). A value of zero in an array element > > > + * means that there is no update of the relevant probability. > > > + * > > > + * This control is optional and needs to be used when dealing with the hardware which is > > > + * not capable of parsing the compressed header itself. Only drivers which need it will > > > + * implement it. > > > + */ > > > +struct v4l2_ctrl_vp9_compressed_hdr { > > > + __u8 tx_mode; > > > + __u8 tx8[2][1]; > > > + __u8 tx16[2][2]; > > > + __u8 tx32[2][3]; > > > + __u8 coef[4][2][2][6][6][3]; > > > + __u8 skip[3]; > > > + __u8 inter_mode[7][3]; > > > + __u8 interp_filter[4][2]; > > > + __u8 is_inter[4]; > > > + __u8 comp_mode[5]; > > > + __u8 single_ref[5][2]; > > > + __u8 comp_ref[5]; > > > + __u8 y_mode[4][9]; > > > + __u8 uv_mode[10][9]; > > > + __u8 partition[16][3]; > > > + > > > + struct v4l2_vp9_mv_probs mv; > > > +}; > > > + > > > /* MPEG-compression definitions kept for backwards compatibility */ > > > #define V4L2_CTRL_CLASS_MPEG V4L2_CTRL_CLASS_CODEC > > > #define V4L2_CID_MPEG_CLASS V4L2_CID_CODEC_CLASS > > > diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h > > > index dcc0b01dfa9a..6e3d58e5a5c4 100644 > > > --- a/include/linux/videodev2.h > > > +++ b/include/linux/videodev2.h > > > @@ -563,6 +563,7 @@ struct v4l2_pix_format { > > > /* Grey bit-packed formats */ > > > #define V4L2_PIX_FMT_Y10BPACK v4l2_fourcc('Y', '1', '0', 'B') /* 10 Greyscale bit-packed */ > > > #define V4L2_PIX_FMT_Y10P v4l2_fourcc('Y', '1', '0', 'P') /* 10 Greyscale, MIPI RAW10 packed */ > > > +#define V4L2_PIX_FMT_IPU3_Y10 v4l2_fourcc('i', 'p', '3', 'y') /* IPU3 packed 10-bit greyscale */ > > > > > > /* Palette formats */ > > > #define V4L2_PIX_FMT_PAL8 v4l2_fourcc('P', 'A', 'L', '8') /* 8 8-bit palette */ > > > @@ -626,6 +627,8 @@ struct v4l2_pix_format { > > > /* Tiled YUV formats, non contiguous planes */ > > > #define V4L2_PIX_FMT_NV12MT v4l2_fourcc('T', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 64x32 tiles */ > > > #define V4L2_PIX_FMT_NV12MT_16X16 v4l2_fourcc('V', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 16x16 tiles */ > > > +#define V4L2_PIX_FMT_NV12M_8L128 v4l2_fourcc('N', 'A', '1', '2') /* Y/CbCr 4:2:0 8x128 tiles */ > > > +#define V4L2_PIX_FMT_NV12M_10BE_8L128 v4l2_fourcc_be('N', 'T', '1', '2') /* Y/CbCr 4:2:0 10-bit 8x128 tiles */ > > > > > > /* Bayer formats - see http://www.siliconimaging.com/RGB%20Bayer.htm */ > > > #define V4L2_PIX_FMT_SBGGR8 v4l2_fourcc('B', 'A', '8', '1') /* 8 BGBG.. GRGR.. */ > > > @@ -697,6 +700,7 @@ struct v4l2_pix_format { > > > #define V4L2_PIX_FMT_VP8 v4l2_fourcc('V', 'P', '8', '0') /* VP8 */ > > > #define V4L2_PIX_FMT_VP8_FRAME v4l2_fourcc('V', 'P', '8', 'F') /* VP8 parsed frame */ > > > #define V4L2_PIX_FMT_VP9 v4l2_fourcc('V', 'P', '9', '0') /* VP9 */ > > > +#define V4L2_PIX_FMT_VP9_FRAME v4l2_fourcc('V', 'P', '9', 'F') /* VP9 parsed frame */ > > > #define V4L2_PIX_FMT_HEVC v4l2_fourcc('H', 'E', 'V', 'C') /* HEVC aka H.265 */ > > > #define V4L2_PIX_FMT_FWHT v4l2_fourcc('F', 'W', 'H', 'T') /* Fast Walsh Hadamard Transform (vicodec) */ > > > #define V4L2_PIX_FMT_FWHT_STATELESS v4l2_fourcc('S', 'F', 'W', 'H') /* Stateless FWHT (vicodec) */ > > > @@ -737,8 +741,10 @@ struct v4l2_pix_format { > > > #define V4L2_PIX_FMT_INZI v4l2_fourcc('I', 'N', 'Z', 'I') /* Intel Planar Greyscale 10-bit and Depth 16-bit */ > > > #define V4L2_PIX_FMT_CNF4 v4l2_fourcc('C', 'N', 'F', '4') /* Intel 4-bit packed depth confidence information */ > > > #define V4L2_PIX_FMT_HI240 v4l2_fourcc('H', 'I', '2', '4') /* BTTV 8-bit dithered RGB */ > > > +#define V4L2_PIX_FMT_QC08C v4l2_fourcc('Q', '0', '8', 'C') /* Qualcomm 8-bit compressed */ > > > +#define V4L2_PIX_FMT_QC10C v4l2_fourcc('Q', '1', '0', 'C') /* Qualcomm 10-bit compressed */ > > > > > > -/* 10bit raw bayer packed, 32 bytes for every 25 pixels, last LSB 6 bits unused */ > > > +/* 10bit raw packed, 32 bytes for every 25 pixels, last LSB 6 bits unused */ > > > #define V4L2_PIX_FMT_IPU3_SBGGR10 v4l2_fourcc('i', 'p', '3', 'b') /* IPU3 packed 10-bit BGGR bayer */ > > > #define V4L2_PIX_FMT_IPU3_SGBRG10 v4l2_fourcc('i', 'p', '3', 'g') /* IPU3 packed 10-bit GBRG bayer */ > > > #define V4L2_PIX_FMT_IPU3_SGRBG10 v4l2_fourcc('i', 'p', '3', 'G') /* IPU3 packed 10-bit GRBG bayer */ > > > @@ -1732,6 +1738,8 @@ struct v4l2_ext_control { > > > struct v4l2_ctrl_mpeg2_sequence *p_mpeg2_sequence; > > > struct v4l2_ctrl_mpeg2_picture *p_mpeg2_picture; > > > struct v4l2_ctrl_mpeg2_quantisation *p_mpeg2_quantisation; > > > + struct v4l2_ctrl_vp9_compressed_hdr *p_vp9_compressed_hdr_probs; > > > + struct v4l2_ctrl_vp9_frame *p_vp9_frame; > > > void *ptr; > > > }; > > > } __attribute__ ((packed)); > > > @@ -1792,6 +1800,9 @@ enum v4l2_ctrl_type { > > > V4L2_CTRL_TYPE_MPEG2_QUANTISATION = 0x0250, > > > V4L2_CTRL_TYPE_MPEG2_SEQUENCE = 0x0251, > > > V4L2_CTRL_TYPE_MPEG2_PICTURE = 0x0252, > > > + > > > + V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR = 0x0260, > > > + V4L2_CTRL_TYPE_VP9_FRAME = 0x0261, > > > }; > > > > > > /* Used in the VIDIOC_QUERYCTRL ioctl for querying controls */ > > -- > Regards, > > Laurent Pinchart
Hi Laurent On Mon, Aug 01, 2022 at 10:47:04PM +0300, Laurent Pinchart wrote: > Hi Jacopo, > > On Mon, Aug 01, 2022 at 05:16:29PM +0200, Jacopo Mondi wrote: > > On Mon, Aug 01, 2022 at 03:05:31AM +0300, Laurent Pinchart via libcamera-devel wrote: > > > Update kernel headers to v5.19 using utils/update-kernel-headers.sh and > > > re-instating libcamera local modifications. > > > > Don't we need something better than this ? > > > > should we regularly rebase the libcamera-changes on top of a new > > header export per each kernel release ? > > > > Otherwise updating headers and re-applying the local modifications in > > one go makes it impossible to actually track what's local and what's > > upstream ? > > This patch was possibly easier to generate than it is to review. The > update-kernel-headers.sh script undoes all the local changes, and I've > then used git add -p to avoid picking up the reverts. This is a manual > process that can lead to errors. > The error-proness is what I'm concerned with > On the review side, it's really about making sure that the update > doesn't drop any of the features we depend on. It may seem error-prone > too, but most (not all though) of the local changes we carry will be > detected at compilation time of reverted. > True that > The best way to avoid all this is of course to upstream all the changes, > and that's something we keep working on, with various delays depending > on the features. For instance, patches 02/13 and 03/13 in this series > will effectively disappear once we upgrade to the v5.20 kernel headers. > Other changes take longer to upstream. > > I'm open to other ideas to improve the process, but completely > overwriting the headers and then reapplying local changes on top will > break compilation during bisection. I can only suggest to do that on the side and compare the output. But that's a suggestion for review more than for development. > > > > Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > > > --- > > > include/linux/README | 2 +- > > > include/linux/dma-buf.h | 4 +- > > > include/linux/drm_fourcc.h | 86 +++++++++- > > > include/linux/intel-ipu3.h | 35 ++-- > > > include/linux/v4l2-controls.h | 301 +++++++++++++++++++++++++++++++++- > > > include/linux/videodev2.h | 13 +- > > > 6 files changed, 418 insertions(+), 23 deletions(-) > > > > > > diff --git a/include/linux/README b/include/linux/README > > > index 4e314b9820ce..9f61517a119a 100644 > > > --- a/include/linux/README > > > +++ b/include/linux/README > > > @@ -1,4 +1,4 @@ > > > # SPDX-License-Identifier: CC0-1.0 > > > > > > -Files in this directory are imported from v5.16-rc7 of the Linux kernel. Do not > > > +Files in this directory are imported from v5.19 of the Linux kernel. Do not > > > modify them manually. > > > diff --git a/include/linux/dma-buf.h b/include/linux/dma-buf.h > > > index 8e4a2ca0bcbf..b1523cb8ab30 100644 > > > --- a/include/linux/dma-buf.h > > > +++ b/include/linux/dma-buf.h > > > @@ -92,7 +92,7 @@ struct dma_buf_sync { > > > * between them in actual uapi, they're just different numbers. > > > */ > > > #define DMA_BUF_SET_NAME _IOW(DMA_BUF_BASE, 1, const char *) > > > -#define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, u32) > > > -#define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, u64) > > > +#define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, __u32) > > > +#define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, __u64) > > > > > > #endif > > > diff --git a/include/linux/drm_fourcc.h b/include/linux/drm_fourcc.h > > > index ea11dcb405e5..cc69eecc606f 100644 > > > --- a/include/linux/drm_fourcc.h > > > +++ b/include/linux/drm_fourcc.h > > > @@ -314,6 +314,13 @@ extern "C" { > > > */ > > > #define DRM_FORMAT_P016 fourcc_code('P', '0', '1', '6') /* 2x2 subsampled Cr:Cb plane 16 bits per channel */ > > > > > > +/* 2 plane YCbCr420. > > > + * 3 10 bit components and 2 padding bits packed into 4 bytes. > > > + * index 0 = Y plane, [31:0] x:Y2:Y1:Y0 2:10:10:10 little endian > > > + * index 1 = Cr:Cb plane, [63:0] x:Cr2:Cb2:Cr1:x:Cb1:Cr0:Cb0 [2:10:10:10:2:10:10:10] little endian > > > + */ > > > +#define DRM_FORMAT_P030 fourcc_code('P', '0', '3', '0') /* 2x2 subsampled Cr:Cb plane 10 bits per channel packed */ > > > + > > > /* 3 plane non-subsampled (444) YCbCr > > > * 16 bits per component, but only 10 bits are used and 6 bits are padded > > > * index 0: Y plane, [15:0] Y:x [10:6] little endian > > > @@ -630,6 +637,53 @@ extern "C" { > > > */ > > > #define I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC fourcc_mod_code(INTEL, 8) > > > > > > +/* > > > + * Intel Tile 4 layout > > > + * > > > + * This is a tiled layout using 4KB tiles in a row-major layout. It has the same > > > + * shape as Tile Y at two granularities: 4KB (128B x 32) and 64B (16B x 4). It > > > + * only differs from Tile Y at the 256B granularity in between. At this > > > + * granularity, Tile Y has a shape of 16B x 32 rows, but this tiling has a shape > > > + * of 64B x 8 rows. > > > + */ > > > +#define I915_FORMAT_MOD_4_TILED fourcc_mod_code(INTEL, 9) > > > + > > > +/* > > > + * Intel color control surfaces (CCS) for DG2 render compression. > > > + * > > > + * The main surface is Tile 4 and at plane index 0. The CCS data is stored > > > + * outside of the GEM object in a reserved memory area dedicated for the > > > + * storage of the CCS data for all RC/RC_CC/MC compressible GEM objects. The > > > + * main surface pitch is required to be a multiple of four Tile 4 widths. > > > + */ > > > +#define I915_FORMAT_MOD_4_TILED_DG2_RC_CCS fourcc_mod_code(INTEL, 10) > > > + > > > +/* > > > + * Intel color control surfaces (CCS) for DG2 media compression. > > > + * > > > + * The main surface is Tile 4 and at plane index 0. For semi-planar formats > > > + * like NV12, the Y and UV planes are Tile 4 and are located at plane indices > > > + * 0 and 1, respectively. The CCS for all planes are stored outside of the > > > + * GEM object in a reserved memory area dedicated for the storage of the > > > + * CCS data for all RC/RC_CC/MC compressible GEM objects. The main surface > > > + * pitch is required to be a multiple of four Tile 4 widths. > > > + */ > > > +#define I915_FORMAT_MOD_4_TILED_DG2_MC_CCS fourcc_mod_code(INTEL, 11) > > > + > > > +/* > > > + * Intel Color Control Surface with Clear Color (CCS) for DG2 render compression. > > > + * > > > + * The main surface is Tile 4 and at plane index 0. The CCS data is stored > > > + * outside of the GEM object in a reserved memory area dedicated for the > > > + * storage of the CCS data for all RC/RC_CC/MC compressible GEM objects. The > > > + * main surface pitch is required to be a multiple of four Tile 4 widths. The > > > + * clear color is stored at plane index 1 and the pitch should be ignored. The > > > + * format of the 256 bits of clear color data matches the one used for the > > > + * I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC modifier, see its description > > > + * for details. > > > + */ > > > +#define I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC fourcc_mod_code(INTEL, 12) > > > + > > > /* > > > * IPU3 Bayer packing layout > > > * > > > @@ -638,7 +692,7 @@ extern "C" { > > > * the 6 most significant bits in the last byte unused. The format is little > > > * endian. > > > */ > > > -#define IPU3_FORMAT_MOD_PACKED fourcc_mod_code(INTEL, 9) > > > +#define IPU3_FORMAT_MOD_PACKED fourcc_mod_code(INTEL, 13) > > > > > > /* > > > * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks > > > @@ -677,6 +731,28 @@ extern "C" { > > > */ > > > #define DRM_FORMAT_MOD_QCOM_COMPRESSED fourcc_mod_code(QCOM, 1) > > > > > > +/* > > > + * Qualcomm Tiled Format > > > + * > > > + * Similar to DRM_FORMAT_MOD_QCOM_COMPRESSED but not compressed. > > > + * Implementation may be platform and base-format specific. > > > + * > > > + * Each macrotile consists of m x n (mostly 4 x 4) tiles. > > > + * Pixel data pitch/stride is aligned with macrotile width. > > > + * Pixel data height is aligned with macrotile height. > > > + * Entire pixel data buffer is aligned with 4k(bytes). > > > + */ > > > +#define DRM_FORMAT_MOD_QCOM_TILED3 fourcc_mod_code(QCOM, 3) > > > + > > > +/* > > > + * Qualcomm Alternate Tiled Format > > > + * > > > + * Alternate tiled format typically only used within GMEM. > > > + * Implementation may be platform and base-format specific. > > > + */ > > > +#define DRM_FORMAT_MOD_QCOM_TILED2 fourcc_mod_code(QCOM, 2) > > > + > > > + > > > /* Vivante framebuffer modifiers */ > > > > > > /* > > > @@ -929,6 +1005,10 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) > > > * and UV. Some SAND-using hardware stores UV in a separate tiled > > > * image from Y to reduce the column height, which is not supported > > > * with these modifiers. > > > + * > > > + * The DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT modifier is also > > > + * supported for DRM_FORMAT_P030 where the columns remain as 128 bytes > > > + * wide, but as this is a 10 bpp format that translates to 96 pixels. > > > */ > > > > > > #define DRM_FORMAT_MOD_BROADCOM_SAND32_COL_HEIGHT(v) \ > > > @@ -1439,11 +1519,11 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) > > > #define AMD_FMT_MOD_PIPE_MASK 0x7 > > > > > > #define AMD_FMT_MOD_SET(field, value) \ > > > - ((uint64_t)(value) << AMD_FMT_MOD_##field##_SHIFT) > > > + ((__u64)(value) << AMD_FMT_MOD_##field##_SHIFT) > > > #define AMD_FMT_MOD_GET(field, value) \ > > > (((value) >> AMD_FMT_MOD_##field##_SHIFT) & AMD_FMT_MOD_##field##_MASK) > > > #define AMD_FMT_MOD_CLEAR(field) \ > > > - (~((uint64_t)AMD_FMT_MOD_##field##_MASK << AMD_FMT_MOD_##field##_SHIFT)) > > > + (~((__u64)AMD_FMT_MOD_##field##_MASK << AMD_FMT_MOD_##field##_SHIFT)) > > > > > > /* Mobile Industry Processor Interface (MIPI) modifiers */ > > > > > > diff --git a/include/linux/intel-ipu3.h b/include/linux/intel-ipu3.h > > > index f30dce43d1d8..5c298ec557fa 100644 > > > --- a/include/linux/intel-ipu3.h > > > +++ b/include/linux/intel-ipu3.h > > > @@ -34,11 +34,17 @@ > > > * struct ipu3_uapi_grid_config - Grid plane config > > > * > > > * @width: Grid horizontal dimensions, in number of grid blocks(cells). > > > + * For AWB, the range is (16, 80). > > > + * For AF/AE, the range is (16, 32). > > > * @height: Grid vertical dimensions, in number of grid cells. > > > + * For AWB, the range is (16, 60). > > > + * For AF/AE, the range is (16, 24). > > > * @block_width_log2: Log2 of the width of each cell in pixels. > > > - * for (2^3, 2^4, 2^5, 2^6, 2^7), values [3, 7]. > > > + * For AWB, the range is [3, 6]. > > > + * For AF/AE, the range is [3, 7]. > > > * @block_height_log2: Log2 of the height of each cell in pixels. > > > - * for (2^3, 2^4, 2^5, 2^6, 2^7), values [3, 7]. > > > + * For AWB, the range is [3, 6]. > > > + * For AF/AE, the range is [3, 7]. > > > * @height_per_slice: The number of blocks in vertical axis per slice. > > > * Default 2. > > > * @x_start: X value of top left corner of Region of Interest(ROI). > > > @@ -68,21 +74,21 @@ struct ipu3_uapi_grid_config { > > > * @R_avg: Red average in the cell. > > > * @B_avg: Blue average in the cell. > > > * @Gb_avg: Green average for blue lines in the cell. > > > - * @sat_ratio: Percentage of pixels over a given threshold set in > > > + * @sat_ratio: Percentage of pixels over the thresholds specified in > > > * ipu3_uapi_awb_config_s, coded from 0 to 255. > > > - * @padding0: Unused byte for padding. > > > - * @padding1: Unused byte for padding. > > > - * @padding2: Unused byte for padding. > > > + * @padding0: Unused byte for padding. > > > + * @padding1: Unused byte for padding. > > > + * @padding2: Unused byte for padding. > > > */ > > > struct ipu3_uapi_awb_set_item { > > > - unsigned char Gr_avg; > > > - unsigned char R_avg; > > > - unsigned char B_avg; > > > - unsigned char Gb_avg; > > > - unsigned char sat_ratio; > > > - unsigned char padding0; > > > - unsigned char padding1; > > > - unsigned char padding2; > > > + __u8 Gr_avg; > > > + __u8 R_avg; > > > + __u8 B_avg; > > > + __u8 Gb_avg; > > > + __u8 sat_ratio; > > > + __u8 padding0; > > > + __u8 padding1; > > > + __u8 padding2; > > > } __attribute__((packed)); > > > > > > /* > > > @@ -98,7 +104,6 @@ struct ipu3_uapi_awb_set_item { > > > (IPU3_UAPI_AWB_MAX_SETS * \ > > > (IPU3_UAPI_AWB_SET_SIZE + IPU3_UAPI_AWB_SPARE_FOR_BUBBLES)) > > > > > > - > > > /** > > > * struct ipu3_uapi_awb_raw_buffer - AWB raw buffer > > > * > > > diff --git a/include/linux/v4l2-controls.h b/include/linux/v4l2-controls.h > > > index a055d2576253..9d2a8237e712 100644 > > > --- a/include/linux/v4l2-controls.h > > > +++ b/include/linux/v4l2-controls.h > > > @@ -128,6 +128,7 @@ enum v4l2_colorfx { > > > V4L2_COLORFX_SOLARIZATION = 13, > > > V4L2_COLORFX_ANTIQUE = 14, > > > V4L2_COLORFX_SET_CBCR = 15, > > > + V4L2_COLORFX_SET_RGB = 16, > > > }; > > > #define V4L2_CID_AUTOBRIGHTNESS (V4L2_CID_BASE+32) > > > #define V4L2_CID_BAND_STOP_FILTER (V4L2_CID_BASE+33) > > > @@ -145,9 +146,10 @@ enum v4l2_colorfx { > > > > > > #define V4L2_CID_ALPHA_COMPONENT (V4L2_CID_BASE+41) > > > #define V4L2_CID_COLORFX_CBCR (V4L2_CID_BASE+42) > > > +#define V4L2_CID_COLORFX_RGB (V4L2_CID_BASE+43) > > > > > > /* last CID + 1 */ > > > -#define V4L2_CID_LASTP1 (V4L2_CID_BASE+43) > > > +#define V4L2_CID_LASTP1 (V4L2_CID_BASE+44) > > > > > > /* USER-class private control IDs */ > > > > > > @@ -221,6 +223,12 @@ enum v4l2_colorfx { > > > */ > > > #define V4L2_CID_USER_ALLEGRO_BASE (V4L2_CID_USER_BASE + 0x1170) > > > > > > +/* > > > + * The base for the isl7998x driver controls. > > > + * We reserve 16 controls for this driver. > > > + */ > > > +#define V4L2_CID_USER_ISL7998X_BASE (V4L2_CID_USER_BASE + 0x1180) > > > + > > > /* MPEG-class control IDs */ > > > /* The MPEG controls are applicable to all codec controls > > > * and the 'MPEG' part of the define is historical */ > > > @@ -443,6 +451,11 @@ enum v4l2_mpeg_video_multi_slice_mode { > > > #define V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES (V4L2_CID_CODEC_BASE+234) > > > #define V4L2_CID_MPEG_VIDEO_DEC_CONCEAL_COLOR (V4L2_CID_CODEC_BASE+235) > > > #define V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD (V4L2_CID_CODEC_BASE+236) > > > +#define V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE (V4L2_CID_CODEC_BASE+237) > > > +enum v4l2_mpeg_video_intra_refresh_period_type { > > > + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM = 0, > > > + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC = 1, > > > +}; > > > > > > /* CIDs for the MPEG-2 Part 2 (H.262) codec */ > > > #define V4L2_CID_MPEG_VIDEO_MPEG2_LEVEL (V4L2_CID_CODEC_BASE+270) > > > @@ -1563,6 +1576,8 @@ struct v4l2_h264_dpb_entry { > > > #define V4L2_H264_DECODE_PARAM_FLAG_IDR_PIC 0x01 > > > #define V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC 0x02 > > > #define V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD 0x04 > > > +#define V4L2_H264_DECODE_PARAM_FLAG_PFRAME 0x08 > > > +#define V4L2_H264_DECODE_PARAM_FLAG_BFRAME 0x10 > > > > > > #define V4L2_CID_STATELESS_H264_DECODE_PARAMS (V4L2_CID_CODEC_STATELESS_BASE + 7) > > > /** > > > @@ -2018,6 +2033,290 @@ struct v4l2_ctrl_hdr10_mastering_display { > > > __u32 min_display_mastering_luminance; > > > }; > > > > > > +/* Stateless VP9 controls */ > > > + > > > +#define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED 0x1 > > > +#define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE 0x2 > > > + > > > +/** > > > + * struct v4l2_vp9_loop_filter - VP9 loop filter parameters > > > + * > > > + * @ref_deltas: contains the adjustment needed for the filter level based on the > > > + * chosen reference frame. If this syntax element is not present in the bitstream, > > > + * users should pass its last value. > > > + * @mode_deltas: contains the adjustment needed for the filter level based on the > > > + * chosen mode. If this syntax element is not present in the bitstream, users should > > > + * pass its last value. > > > + * @level: indicates the loop filter strength. > > > + * @sharpness: indicates the sharpness level. > > > + * @flags: combination of V4L2_VP9_LOOP_FILTER_FLAG_{} flags. > > > + * @reserved: padding field. Should be zeroed by applications. > > > + * > > > + * This structure contains all loop filter related parameters. See sections > > > + * '7.2.8 Loop filter semantics' of the VP9 specification for more details. > > > + */ > > > +struct v4l2_vp9_loop_filter { > > > + __s8 ref_deltas[4]; > > > + __s8 mode_deltas[2]; > > > + __u8 level; > > > + __u8 sharpness; > > > + __u8 flags; > > > + __u8 reserved[7]; > > > +}; > > > + > > > +/** > > > + * struct v4l2_vp9_quantization - VP9 quantization parameters > > > + * > > > + * @base_q_idx: indicates the base frame qindex. > > > + * @delta_q_y_dc: indicates the Y DC quantizer relative to base_q_idx. > > > + * @delta_q_uv_dc: indicates the UV DC quantizer relative to base_q_idx. > > > + * @delta_q_uv_ac: indicates the UV AC quantizer relative to base_q_idx. > > > + * @reserved: padding field. Should be zeroed by applications. > > > + * > > > + * Encodes the quantization parameters. See section '7.2.9 Quantization params > > > + * syntax' of the VP9 specification for more details. > > > + */ > > > +struct v4l2_vp9_quantization { > > > + __u8 base_q_idx; > > > + __s8 delta_q_y_dc; > > > + __s8 delta_q_uv_dc; > > > + __s8 delta_q_uv_ac; > > > + __u8 reserved[4]; > > > +}; > > > + > > > +#define V4L2_VP9_SEGMENTATION_FLAG_ENABLED 0x01 > > > +#define V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP 0x02 > > > +#define V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE 0x04 > > > +#define V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA 0x08 > > > +#define V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE 0x10 > > > + > > > +#define V4L2_VP9_SEG_LVL_ALT_Q 0 > > > +#define V4L2_VP9_SEG_LVL_ALT_L 1 > > > +#define V4L2_VP9_SEG_LVL_REF_FRAME 2 > > > +#define V4L2_VP9_SEG_LVL_SKIP 3 > > > +#define V4L2_VP9_SEG_LVL_MAX 4 > > > + > > > +#define V4L2_VP9_SEGMENT_FEATURE_ENABLED(id) (1 << (id)) > > > +#define V4L2_VP9_SEGMENT_FEATURE_ENABLED_MASK 0xf > > > + > > > +/** > > > + * struct v4l2_vp9_segmentation - VP9 segmentation parameters > > > + * > > > + * @feature_data: data attached to each feature. Data entry is only valid if > > > + * the feature is enabled. The array shall be indexed with segment number as > > > + * the first dimension (0..7) and one of V4L2_VP9_SEG_{} as the second dimension. > > > + * @feature_enabled: bitmask defining which features are enabled in each segment. > > > + * The value for each segment is a combination of V4L2_VP9_SEGMENT_FEATURE_ENABLED(id) > > > + * values where id is one of V4L2_VP9_SEG_LVL_{}. > > > + * @tree_probs: specifies the probability values to be used when decoding a > > > + * Segment-ID. See '5.15. Segmentation map' section of the VP9 specification > > > + * for more details. > > > + * @pred_probs: specifies the probability values to be used when decoding a > > > + * Predicted-Segment-ID. See '6.4.14. Get segment id syntax' section of :ref:`vp9` > > > + * for more details. > > > + * @flags: combination of V4L2_VP9_SEGMENTATION_FLAG_{} flags. > > > + * @reserved: padding field. Should be zeroed by applications. > > > + * > > > + * Encodes the quantization parameters. See section '7.2.10 Segmentation params syntax' of > > > + * the VP9 specification for more details. > > > + */ > > > +struct v4l2_vp9_segmentation { > > > + __s16 feature_data[8][4]; > > > + __u8 feature_enabled[8]; > > > + __u8 tree_probs[7]; > > > + __u8 pred_probs[3]; > > > + __u8 flags; > > > + __u8 reserved[5]; > > > +}; > > > + > > > +#define V4L2_VP9_FRAME_FLAG_KEY_FRAME 0x001 > > > +#define V4L2_VP9_FRAME_FLAG_SHOW_FRAME 0x002 > > > +#define V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT 0x004 > > > +#define V4L2_VP9_FRAME_FLAG_INTRA_ONLY 0x008 > > > +#define V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV 0x010 > > > +#define V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX 0x020 > > > +#define V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE 0x040 > > > +#define V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING 0x080 > > > +#define V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING 0x100 > > > +#define V4L2_VP9_FRAME_FLAG_COLOR_RANGE_FULL_SWING 0x200 > > > + > > > +#define V4L2_VP9_SIGN_BIAS_LAST 0x1 > > > +#define V4L2_VP9_SIGN_BIAS_GOLDEN 0x2 > > > +#define V4L2_VP9_SIGN_BIAS_ALT 0x4 > > > + > > > +#define V4L2_VP9_RESET_FRAME_CTX_NONE 0 > > > +#define V4L2_VP9_RESET_FRAME_CTX_SPEC 1 > > > +#define V4L2_VP9_RESET_FRAME_CTX_ALL 2 > > > + > > > +#define V4L2_VP9_INTERP_FILTER_EIGHTTAP 0 > > > +#define V4L2_VP9_INTERP_FILTER_EIGHTTAP_SMOOTH 1 > > > +#define V4L2_VP9_INTERP_FILTER_EIGHTTAP_SHARP 2 > > > +#define V4L2_VP9_INTERP_FILTER_BILINEAR 3 > > > +#define V4L2_VP9_INTERP_FILTER_SWITCHABLE 4 > > > + > > > +#define V4L2_VP9_REFERENCE_MODE_SINGLE_REFERENCE 0 > > > +#define V4L2_VP9_REFERENCE_MODE_COMPOUND_REFERENCE 1 > > > +#define V4L2_VP9_REFERENCE_MODE_SELECT 2 > > > + > > > +#define V4L2_VP9_PROFILE_MAX 3 > > > + > > > +#define V4L2_CID_STATELESS_VP9_FRAME (V4L2_CID_CODEC_STATELESS_BASE + 300) > > > +/** > > > + * struct v4l2_ctrl_vp9_frame - VP9 frame decoding control > > > + * > > > + * @lf: loop filter parameters. See &v4l2_vp9_loop_filter for more details. > > > + * @quant: quantization parameters. See &v4l2_vp9_quantization for more details. > > > + * @seg: segmentation parameters. See &v4l2_vp9_segmentation for more details. > > > + * @flags: combination of V4L2_VP9_FRAME_FLAG_{} flags. > > > + * @compressed_header_size: compressed header size in bytes. > > > + * @uncompressed_header_size: uncompressed header size in bytes. > > > + * @frame_width_minus_1: add 1 to it and you'll get the frame width expressed in pixels. > > > + * @frame_height_minus_1: add 1 to it and you'll get the frame height expressed in pixels. > > > + * @render_width_minus_1: add 1 to it and you'll get the expected render width expressed in > > > + * pixels. This is not used during the decoding process but might be used by HW scalers > > > + * to prepare a frame that's ready for scanout. > > > + * @render_height_minus_1: add 1 to it and you'll get the expected render height expressed in > > > + * pixels. This is not used during the decoding process but might be used by HW scalers > > > + * to prepare a frame that's ready for scanout. > > > + * @last_frame_ts: "last" reference buffer timestamp. > > > + * The timestamp refers to the timestamp field in struct v4l2_buffer. > > > + * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64. > > > + * @golden_frame_ts: "golden" reference buffer timestamp. > > > + * The timestamp refers to the timestamp field in struct v4l2_buffer. > > > + * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64. > > > + * @alt_frame_ts: "alt" reference buffer timestamp. > > > + * The timestamp refers to the timestamp field in struct v4l2_buffer. > > > + * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64. > > > + * @ref_frame_sign_bias: a bitfield specifying whether the sign bias is set for a given > > > + * reference frame. Either of V4L2_VP9_SIGN_BIAS_{}. > > > + * @reset_frame_context: specifies whether the frame context should be reset to default values. > > > + * Either of V4L2_VP9_RESET_FRAME_CTX_{}. > > > + * @frame_context_idx: frame context that should be used/updated. > > > + * @profile: VP9 profile. Can be 0, 1, 2 or 3. > > > + * @bit_depth: bits per components. Can be 8, 10 or 12. Note that not all profiles support > > > + * 10 and/or 12 bits depths. > > > + * @interpolation_filter: specifies the filter selection used for performing inter prediction. > > > + * Set to one of V4L2_VP9_INTERP_FILTER_{}. > > > + * @tile_cols_log2: specifies the base 2 logarithm of the width of each tile (where the width > > > + * is measured in units of 8x8 blocks). Shall be less than or equal to 6. > > > + * @tile_rows_log2: specifies the base 2 logarithm of the height of each tile (where the height > > > + * is measured in units of 8x8 blocks). > > > + * @reference_mode: specifies the type of inter prediction to be used. > > > + * Set to one of V4L2_VP9_REFERENCE_MODE_{}. > > > + * @reserved: padding field. Should be zeroed by applications. > > > + */ > > > +struct v4l2_ctrl_vp9_frame { > > > + struct v4l2_vp9_loop_filter lf; > > > + struct v4l2_vp9_quantization quant; > > > + struct v4l2_vp9_segmentation seg; > > > + __u32 flags; > > > + __u16 compressed_header_size; > > > + __u16 uncompressed_header_size; > > > + __u16 frame_width_minus_1; > > > + __u16 frame_height_minus_1; > > > + __u16 render_width_minus_1; > > > + __u16 render_height_minus_1; > > > + __u64 last_frame_ts; > > > + __u64 golden_frame_ts; > > > + __u64 alt_frame_ts; > > > + __u8 ref_frame_sign_bias; > > > + __u8 reset_frame_context; > > > + __u8 frame_context_idx; > > > + __u8 profile; > > > + __u8 bit_depth; > > > + __u8 interpolation_filter; > > > + __u8 tile_cols_log2; > > > + __u8 tile_rows_log2; > > > + __u8 reference_mode; > > > + __u8 reserved[7]; > > > +}; > > > + > > > +#define V4L2_VP9_NUM_FRAME_CTX 4 > > > + > > > +/** > > > + * struct v4l2_vp9_mv_probs - VP9 Motion vector probability updates > > > + * @joint: motion vector joint probability updates. > > > + * @sign: motion vector sign probability updates. > > > + * @classes: motion vector class probability updates. > > > + * @class0_bit: motion vector class0 bit probability updates. > > > + * @bits: motion vector bits probability updates. > > > + * @class0_fr: motion vector class0 fractional bit probability updates. > > > + * @fr: motion vector fractional bit probability updates. > > > + * @class0_hp: motion vector class0 high precision fractional bit probability updates. > > > + * @hp: motion vector high precision fractional bit probability updates. > > > + * > > > + * This structure contains new values of motion vector probabilities. > > > + * A value of zero in an array element means there is no update of the relevant probability. > > > + * See `struct v4l2_vp9_prob_updates` for details. > > > + */ > > > +struct v4l2_vp9_mv_probs { > > > + __u8 joint[3]; > > > + __u8 sign[2]; > > > + __u8 classes[2][10]; > > > + __u8 class0_bit[2]; > > > + __u8 bits[2][10]; > > > + __u8 class0_fr[2][2][3]; > > > + __u8 fr[2][3]; > > > + __u8 class0_hp[2]; > > > + __u8 hp[2]; > > > +}; > > > + > > > +#define V4L2_CID_STATELESS_VP9_COMPRESSED_HDR (V4L2_CID_CODEC_STATELESS_BASE + 301) > > > + > > > +#define V4L2_VP9_TX_MODE_ONLY_4X4 0 > > > +#define V4L2_VP9_TX_MODE_ALLOW_8X8 1 > > > +#define V4L2_VP9_TX_MODE_ALLOW_16X16 2 > > > +#define V4L2_VP9_TX_MODE_ALLOW_32X32 3 > > > +#define V4L2_VP9_TX_MODE_SELECT 4 > > > + > > > +/** > > > + * struct v4l2_ctrl_vp9_compressed_hdr - VP9 probability updates control > > > + * @tx_mode: specifies the TX mode. Set to one of V4L2_VP9_TX_MODE_{}. > > > + * @tx8: TX 8x8 probability updates. > > > + * @tx16: TX 16x16 probability updates. > > > + * @tx32: TX 32x32 probability updates. > > > + * @coef: coefficient probability updates. > > > + * @skip: skip probability updates. > > > + * @inter_mode: inter mode probability updates. > > > + * @interp_filter: interpolation filter probability updates. > > > + * @is_inter: is inter-block probability updates. > > > + * @comp_mode: compound prediction mode probability updates. > > > + * @single_ref: single ref probability updates. > > > + * @comp_ref: compound ref probability updates. > > > + * @y_mode: Y prediction mode probability updates. > > > + * @uv_mode: UV prediction mode probability updates. > > > + * @partition: partition probability updates. > > > + * @mv: motion vector probability updates. > > > + * > > > + * This structure holds the probabilities update as parsed in the compressed > > > + * header (Spec 6.3). These values represent the value of probability update after > > > + * being translated with inv_map_table[] (see 6.3.5). A value of zero in an array element > > > + * means that there is no update of the relevant probability. > > > + * > > > + * This control is optional and needs to be used when dealing with the hardware which is > > > + * not capable of parsing the compressed header itself. Only drivers which need it will > > > + * implement it. > > > + */ > > > +struct v4l2_ctrl_vp9_compressed_hdr { > > > + __u8 tx_mode; > > > + __u8 tx8[2][1]; > > > + __u8 tx16[2][2]; > > > + __u8 tx32[2][3]; > > > + __u8 coef[4][2][2][6][6][3]; > > > + __u8 skip[3]; > > > + __u8 inter_mode[7][3]; > > > + __u8 interp_filter[4][2]; > > > + __u8 is_inter[4]; > > > + __u8 comp_mode[5]; > > > + __u8 single_ref[5][2]; > > > + __u8 comp_ref[5]; > > > + __u8 y_mode[4][9]; > > > + __u8 uv_mode[10][9]; > > > + __u8 partition[16][3]; > > > + > > > + struct v4l2_vp9_mv_probs mv; > > > +}; > > > + > > > /* MPEG-compression definitions kept for backwards compatibility */ > > > #define V4L2_CTRL_CLASS_MPEG V4L2_CTRL_CLASS_CODEC > > > #define V4L2_CID_MPEG_CLASS V4L2_CID_CODEC_CLASS > > > diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h > > > index dcc0b01dfa9a..6e3d58e5a5c4 100644 > > > --- a/include/linux/videodev2.h > > > +++ b/include/linux/videodev2.h > > > @@ -563,6 +563,7 @@ struct v4l2_pix_format { > > > /* Grey bit-packed formats */ > > > #define V4L2_PIX_FMT_Y10BPACK v4l2_fourcc('Y', '1', '0', 'B') /* 10 Greyscale bit-packed */ > > > #define V4L2_PIX_FMT_Y10P v4l2_fourcc('Y', '1', '0', 'P') /* 10 Greyscale, MIPI RAW10 packed */ > > > +#define V4L2_PIX_FMT_IPU3_Y10 v4l2_fourcc('i', 'p', '3', 'y') /* IPU3 packed 10-bit greyscale */ > > > > > > /* Palette formats */ > > > #define V4L2_PIX_FMT_PAL8 v4l2_fourcc('P', 'A', 'L', '8') /* 8 8-bit palette */ > > > @@ -626,6 +627,8 @@ struct v4l2_pix_format { > > > /* Tiled YUV formats, non contiguous planes */ > > > #define V4L2_PIX_FMT_NV12MT v4l2_fourcc('T', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 64x32 tiles */ > > > #define V4L2_PIX_FMT_NV12MT_16X16 v4l2_fourcc('V', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 16x16 tiles */ > > > +#define V4L2_PIX_FMT_NV12M_8L128 v4l2_fourcc('N', 'A', '1', '2') /* Y/CbCr 4:2:0 8x128 tiles */ > > > +#define V4L2_PIX_FMT_NV12M_10BE_8L128 v4l2_fourcc_be('N', 'T', '1', '2') /* Y/CbCr 4:2:0 10-bit 8x128 tiles */ > > > > > > /* Bayer formats - see http://www.siliconimaging.com/RGB%20Bayer.htm */ > > > #define V4L2_PIX_FMT_SBGGR8 v4l2_fourcc('B', 'A', '8', '1') /* 8 BGBG.. GRGR.. */ > > > @@ -697,6 +700,7 @@ struct v4l2_pix_format { > > > #define V4L2_PIX_FMT_VP8 v4l2_fourcc('V', 'P', '8', '0') /* VP8 */ > > > #define V4L2_PIX_FMT_VP8_FRAME v4l2_fourcc('V', 'P', '8', 'F') /* VP8 parsed frame */ > > > #define V4L2_PIX_FMT_VP9 v4l2_fourcc('V', 'P', '9', '0') /* VP9 */ > > > +#define V4L2_PIX_FMT_VP9_FRAME v4l2_fourcc('V', 'P', '9', 'F') /* VP9 parsed frame */ > > > #define V4L2_PIX_FMT_HEVC v4l2_fourcc('H', 'E', 'V', 'C') /* HEVC aka H.265 */ > > > #define V4L2_PIX_FMT_FWHT v4l2_fourcc('F', 'W', 'H', 'T') /* Fast Walsh Hadamard Transform (vicodec) */ > > > #define V4L2_PIX_FMT_FWHT_STATELESS v4l2_fourcc('S', 'F', 'W', 'H') /* Stateless FWHT (vicodec) */ > > > @@ -737,8 +741,10 @@ struct v4l2_pix_format { > > > #define V4L2_PIX_FMT_INZI v4l2_fourcc('I', 'N', 'Z', 'I') /* Intel Planar Greyscale 10-bit and Depth 16-bit */ > > > #define V4L2_PIX_FMT_CNF4 v4l2_fourcc('C', 'N', 'F', '4') /* Intel 4-bit packed depth confidence information */ > > > #define V4L2_PIX_FMT_HI240 v4l2_fourcc('H', 'I', '2', '4') /* BTTV 8-bit dithered RGB */ > > > +#define V4L2_PIX_FMT_QC08C v4l2_fourcc('Q', '0', '8', 'C') /* Qualcomm 8-bit compressed */ > > > +#define V4L2_PIX_FMT_QC10C v4l2_fourcc('Q', '1', '0', 'C') /* Qualcomm 10-bit compressed */ > > > > > > -/* 10bit raw bayer packed, 32 bytes for every 25 pixels, last LSB 6 bits unused */ > > > +/* 10bit raw packed, 32 bytes for every 25 pixels, last LSB 6 bits unused */ > > > #define V4L2_PIX_FMT_IPU3_SBGGR10 v4l2_fourcc('i', 'p', '3', 'b') /* IPU3 packed 10-bit BGGR bayer */ > > > #define V4L2_PIX_FMT_IPU3_SGBRG10 v4l2_fourcc('i', 'p', '3', 'g') /* IPU3 packed 10-bit GBRG bayer */ > > > #define V4L2_PIX_FMT_IPU3_SGRBG10 v4l2_fourcc('i', 'p', '3', 'G') /* IPU3 packed 10-bit GRBG bayer */ > > > @@ -1732,6 +1738,8 @@ struct v4l2_ext_control { > > > struct v4l2_ctrl_mpeg2_sequence *p_mpeg2_sequence; > > > struct v4l2_ctrl_mpeg2_picture *p_mpeg2_picture; > > > struct v4l2_ctrl_mpeg2_quantisation *p_mpeg2_quantisation; > > > + struct v4l2_ctrl_vp9_compressed_hdr *p_vp9_compressed_hdr_probs; > > > + struct v4l2_ctrl_vp9_frame *p_vp9_frame; > > > void *ptr; > > > }; > > > } __attribute__ ((packed)); > > > @@ -1792,6 +1800,9 @@ enum v4l2_ctrl_type { > > > V4L2_CTRL_TYPE_MPEG2_QUANTISATION = 0x0250, > > > V4L2_CTRL_TYPE_MPEG2_SEQUENCE = 0x0251, > > > V4L2_CTRL_TYPE_MPEG2_PICTURE = 0x0252, > > > + > > > + V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR = 0x0260, > > > + V4L2_CTRL_TYPE_VP9_FRAME = 0x0261, > > > }; > > > > > > /* Used in the VIDIOC_QUERYCTRL ioctl for querying controls */ > > -- > Regards, > > Laurent Pinchart
Hi Jacopo, On Tue, Aug 02, 2022 at 09:52:08AM +0200, Jacopo Mondi wrote: > On Mon, Aug 01, 2022 at 10:47:04PM +0300, Laurent Pinchart wrote: > > On Mon, Aug 01, 2022 at 05:16:29PM +0200, Jacopo Mondi wrote: > > > On Mon, Aug 01, 2022 at 03:05:31AM +0300, Laurent Pinchart via libcamera-devel wrote: > > > > Update kernel headers to v5.19 using utils/update-kernel-headers.sh and > > > > re-instating libcamera local modifications. > > > > > > Don't we need something better than this ? > > > > > > should we regularly rebase the libcamera-changes on top of a new > > > header export per each kernel release ? > > > > > > Otherwise updating headers and re-applying the local modifications in > > > one go makes it impossible to actually track what's local and what's > > > upstream ? > > > > This patch was possibly easier to generate than it is to review. The > > update-kernel-headers.sh script undoes all the local changes, and I've > > then used git add -p to avoid picking up the reverts. This is a manual > > process that can lead to errors. > > The error-proness is what I'm concerned with > > > On the review side, it's really about making sure that the update > > doesn't drop any of the features we depend on. It may seem error-prone > > too, but most (not all though) of the local changes we carry will be > > detected at compilation time of reverted. > > True that > > > The best way to avoid all this is of course to upstream all the changes, > > and that's something we keep working on, with various delays depending > > on the features. For instance, patches 02/13 and 03/13 in this series > > will effectively disappear once we upgrade to the v5.20 kernel headers. > > Other changes take longer to upstream. > > > > I'm open to other ideas to improve the process, but completely > > overwriting the headers and then reapplying local changes on top will > > break compilation during bisection. > > I can only suggest to do that on the side and compare the output. > But that's a suggestion for review more than for development. We could indeed post the change as two patches, one that overwrites everything, and the second one that reapplies our local changes, and squash when pushing. > > > > Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > > > > --- > > > > include/linux/README | 2 +- > > > > include/linux/dma-buf.h | 4 +- > > > > include/linux/drm_fourcc.h | 86 +++++++++- > > > > include/linux/intel-ipu3.h | 35 ++-- > > > > include/linux/v4l2-controls.h | 301 +++++++++++++++++++++++++++++++++- > > > > include/linux/videodev2.h | 13 +- > > > > 6 files changed, 418 insertions(+), 23 deletions(-) > > > > > > > > diff --git a/include/linux/README b/include/linux/README > > > > index 4e314b9820ce..9f61517a119a 100644 > > > > --- a/include/linux/README > > > > +++ b/include/linux/README > > > > @@ -1,4 +1,4 @@ > > > > # SPDX-License-Identifier: CC0-1.0 > > > > > > > > -Files in this directory are imported from v5.16-rc7 of the Linux kernel. Do not > > > > +Files in this directory are imported from v5.19 of the Linux kernel. Do not > > > > modify them manually. > > > > diff --git a/include/linux/dma-buf.h b/include/linux/dma-buf.h > > > > index 8e4a2ca0bcbf..b1523cb8ab30 100644 > > > > --- a/include/linux/dma-buf.h > > > > +++ b/include/linux/dma-buf.h > > > > @@ -92,7 +92,7 @@ struct dma_buf_sync { > > > > * between them in actual uapi, they're just different numbers. > > > > */ > > > > #define DMA_BUF_SET_NAME _IOW(DMA_BUF_BASE, 1, const char *) > > > > -#define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, u32) > > > > -#define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, u64) > > > > +#define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, __u32) > > > > +#define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, __u64) > > > > > > > > #endif > > > > diff --git a/include/linux/drm_fourcc.h b/include/linux/drm_fourcc.h > > > > index ea11dcb405e5..cc69eecc606f 100644 > > > > --- a/include/linux/drm_fourcc.h > > > > +++ b/include/linux/drm_fourcc.h > > > > @@ -314,6 +314,13 @@ extern "C" { > > > > */ > > > > #define DRM_FORMAT_P016 fourcc_code('P', '0', '1', '6') /* 2x2 subsampled Cr:Cb plane 16 bits per channel */ > > > > > > > > +/* 2 plane YCbCr420. > > > > + * 3 10 bit components and 2 padding bits packed into 4 bytes. > > > > + * index 0 = Y plane, [31:0] x:Y2:Y1:Y0 2:10:10:10 little endian > > > > + * index 1 = Cr:Cb plane, [63:0] x:Cr2:Cb2:Cr1:x:Cb1:Cr0:Cb0 [2:10:10:10:2:10:10:10] little endian > > > > + */ > > > > +#define DRM_FORMAT_P030 fourcc_code('P', '0', '3', '0') /* 2x2 subsampled Cr:Cb plane 10 bits per channel packed */ > > > > + > > > > /* 3 plane non-subsampled (444) YCbCr > > > > * 16 bits per component, but only 10 bits are used and 6 bits are padded > > > > * index 0: Y plane, [15:0] Y:x [10:6] little endian > > > > @@ -630,6 +637,53 @@ extern "C" { > > > > */ > > > > #define I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC fourcc_mod_code(INTEL, 8) > > > > > > > > +/* > > > > + * Intel Tile 4 layout > > > > + * > > > > + * This is a tiled layout using 4KB tiles in a row-major layout. It has the same > > > > + * shape as Tile Y at two granularities: 4KB (128B x 32) and 64B (16B x 4). It > > > > + * only differs from Tile Y at the 256B granularity in between. At this > > > > + * granularity, Tile Y has a shape of 16B x 32 rows, but this tiling has a shape > > > > + * of 64B x 8 rows. > > > > + */ > > > > +#define I915_FORMAT_MOD_4_TILED fourcc_mod_code(INTEL, 9) > > > > + > > > > +/* > > > > + * Intel color control surfaces (CCS) for DG2 render compression. > > > > + * > > > > + * The main surface is Tile 4 and at plane index 0. The CCS data is stored > > > > + * outside of the GEM object in a reserved memory area dedicated for the > > > > + * storage of the CCS data for all RC/RC_CC/MC compressible GEM objects. The > > > > + * main surface pitch is required to be a multiple of four Tile 4 widths. > > > > + */ > > > > +#define I915_FORMAT_MOD_4_TILED_DG2_RC_CCS fourcc_mod_code(INTEL, 10) > > > > + > > > > +/* > > > > + * Intel color control surfaces (CCS) for DG2 media compression. > > > > + * > > > > + * The main surface is Tile 4 and at plane index 0. For semi-planar formats > > > > + * like NV12, the Y and UV planes are Tile 4 and are located at plane indices > > > > + * 0 and 1, respectively. The CCS for all planes are stored outside of the > > > > + * GEM object in a reserved memory area dedicated for the storage of the > > > > + * CCS data for all RC/RC_CC/MC compressible GEM objects. The main surface > > > > + * pitch is required to be a multiple of four Tile 4 widths. > > > > + */ > > > > +#define I915_FORMAT_MOD_4_TILED_DG2_MC_CCS fourcc_mod_code(INTEL, 11) > > > > + > > > > +/* > > > > + * Intel Color Control Surface with Clear Color (CCS) for DG2 render compression. > > > > + * > > > > + * The main surface is Tile 4 and at plane index 0. The CCS data is stored > > > > + * outside of the GEM object in a reserved memory area dedicated for the > > > > + * storage of the CCS data for all RC/RC_CC/MC compressible GEM objects. The > > > > + * main surface pitch is required to be a multiple of four Tile 4 widths. The > > > > + * clear color is stored at plane index 1 and the pitch should be ignored. The > > > > + * format of the 256 bits of clear color data matches the one used for the > > > > + * I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC modifier, see its description > > > > + * for details. > > > > + */ > > > > +#define I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC fourcc_mod_code(INTEL, 12) > > > > + > > > > /* > > > > * IPU3 Bayer packing layout > > > > * > > > > @@ -638,7 +692,7 @@ extern "C" { > > > > * the 6 most significant bits in the last byte unused. The format is little > > > > * endian. > > > > */ > > > > -#define IPU3_FORMAT_MOD_PACKED fourcc_mod_code(INTEL, 9) > > > > +#define IPU3_FORMAT_MOD_PACKED fourcc_mod_code(INTEL, 13) > > > > > > > > /* > > > > * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks > > > > @@ -677,6 +731,28 @@ extern "C" { > > > > */ > > > > #define DRM_FORMAT_MOD_QCOM_COMPRESSED fourcc_mod_code(QCOM, 1) > > > > > > > > +/* > > > > + * Qualcomm Tiled Format > > > > + * > > > > + * Similar to DRM_FORMAT_MOD_QCOM_COMPRESSED but not compressed. > > > > + * Implementation may be platform and base-format specific. > > > > + * > > > > + * Each macrotile consists of m x n (mostly 4 x 4) tiles. > > > > + * Pixel data pitch/stride is aligned with macrotile width. > > > > + * Pixel data height is aligned with macrotile height. > > > > + * Entire pixel data buffer is aligned with 4k(bytes). > > > > + */ > > > > +#define DRM_FORMAT_MOD_QCOM_TILED3 fourcc_mod_code(QCOM, 3) > > > > + > > > > +/* > > > > + * Qualcomm Alternate Tiled Format > > > > + * > > > > + * Alternate tiled format typically only used within GMEM. > > > > + * Implementation may be platform and base-format specific. > > > > + */ > > > > +#define DRM_FORMAT_MOD_QCOM_TILED2 fourcc_mod_code(QCOM, 2) > > > > + > > > > + > > > > /* Vivante framebuffer modifiers */ > > > > > > > > /* > > > > @@ -929,6 +1005,10 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) > > > > * and UV. Some SAND-using hardware stores UV in a separate tiled > > > > * image from Y to reduce the column height, which is not supported > > > > * with these modifiers. > > > > + * > > > > + * The DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT modifier is also > > > > + * supported for DRM_FORMAT_P030 where the columns remain as 128 bytes > > > > + * wide, but as this is a 10 bpp format that translates to 96 pixels. > > > > */ > > > > > > > > #define DRM_FORMAT_MOD_BROADCOM_SAND32_COL_HEIGHT(v) \ > > > > @@ -1439,11 +1519,11 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) > > > > #define AMD_FMT_MOD_PIPE_MASK 0x7 > > > > > > > > #define AMD_FMT_MOD_SET(field, value) \ > > > > - ((uint64_t)(value) << AMD_FMT_MOD_##field##_SHIFT) > > > > + ((__u64)(value) << AMD_FMT_MOD_##field##_SHIFT) > > > > #define AMD_FMT_MOD_GET(field, value) \ > > > > (((value) >> AMD_FMT_MOD_##field##_SHIFT) & AMD_FMT_MOD_##field##_MASK) > > > > #define AMD_FMT_MOD_CLEAR(field) \ > > > > - (~((uint64_t)AMD_FMT_MOD_##field##_MASK << AMD_FMT_MOD_##field##_SHIFT)) > > > > + (~((__u64)AMD_FMT_MOD_##field##_MASK << AMD_FMT_MOD_##field##_SHIFT)) > > > > > > > > /* Mobile Industry Processor Interface (MIPI) modifiers */ > > > > > > > > diff --git a/include/linux/intel-ipu3.h b/include/linux/intel-ipu3.h > > > > index f30dce43d1d8..5c298ec557fa 100644 > > > > --- a/include/linux/intel-ipu3.h > > > > +++ b/include/linux/intel-ipu3.h > > > > @@ -34,11 +34,17 @@ > > > > * struct ipu3_uapi_grid_config - Grid plane config > > > > * > > > > * @width: Grid horizontal dimensions, in number of grid blocks(cells). > > > > + * For AWB, the range is (16, 80). > > > > + * For AF/AE, the range is (16, 32). > > > > * @height: Grid vertical dimensions, in number of grid cells. > > > > + * For AWB, the range is (16, 60). > > > > + * For AF/AE, the range is (16, 24). > > > > * @block_width_log2: Log2 of the width of each cell in pixels. > > > > - * for (2^3, 2^4, 2^5, 2^6, 2^7), values [3, 7]. > > > > + * For AWB, the range is [3, 6]. > > > > + * For AF/AE, the range is [3, 7]. > > > > * @block_height_log2: Log2 of the height of each cell in pixels. > > > > - * for (2^3, 2^4, 2^5, 2^6, 2^7), values [3, 7]. > > > > + * For AWB, the range is [3, 6]. > > > > + * For AF/AE, the range is [3, 7]. > > > > * @height_per_slice: The number of blocks in vertical axis per slice. > > > > * Default 2. > > > > * @x_start: X value of top left corner of Region of Interest(ROI). > > > > @@ -68,21 +74,21 @@ struct ipu3_uapi_grid_config { > > > > * @R_avg: Red average in the cell. > > > > * @B_avg: Blue average in the cell. > > > > * @Gb_avg: Green average for blue lines in the cell. > > > > - * @sat_ratio: Percentage of pixels over a given threshold set in > > > > + * @sat_ratio: Percentage of pixels over the thresholds specified in > > > > * ipu3_uapi_awb_config_s, coded from 0 to 255. > > > > - * @padding0: Unused byte for padding. > > > > - * @padding1: Unused byte for padding. > > > > - * @padding2: Unused byte for padding. > > > > + * @padding0: Unused byte for padding. > > > > + * @padding1: Unused byte for padding. > > > > + * @padding2: Unused byte for padding. > > > > */ > > > > struct ipu3_uapi_awb_set_item { > > > > - unsigned char Gr_avg; > > > > - unsigned char R_avg; > > > > - unsigned char B_avg; > > > > - unsigned char Gb_avg; > > > > - unsigned char sat_ratio; > > > > - unsigned char padding0; > > > > - unsigned char padding1; > > > > - unsigned char padding2; > > > > + __u8 Gr_avg; > > > > + __u8 R_avg; > > > > + __u8 B_avg; > > > > + __u8 Gb_avg; > > > > + __u8 sat_ratio; > > > > + __u8 padding0; > > > > + __u8 padding1; > > > > + __u8 padding2; > > > > } __attribute__((packed)); > > > > > > > > /* > > > > @@ -98,7 +104,6 @@ struct ipu3_uapi_awb_set_item { > > > > (IPU3_UAPI_AWB_MAX_SETS * \ > > > > (IPU3_UAPI_AWB_SET_SIZE + IPU3_UAPI_AWB_SPARE_FOR_BUBBLES)) > > > > > > > > - > > > > /** > > > > * struct ipu3_uapi_awb_raw_buffer - AWB raw buffer > > > > * > > > > diff --git a/include/linux/v4l2-controls.h b/include/linux/v4l2-controls.h > > > > index a055d2576253..9d2a8237e712 100644 > > > > --- a/include/linux/v4l2-controls.h > > > > +++ b/include/linux/v4l2-controls.h > > > > @@ -128,6 +128,7 @@ enum v4l2_colorfx { > > > > V4L2_COLORFX_SOLARIZATION = 13, > > > > V4L2_COLORFX_ANTIQUE = 14, > > > > V4L2_COLORFX_SET_CBCR = 15, > > > > + V4L2_COLORFX_SET_RGB = 16, > > > > }; > > > > #define V4L2_CID_AUTOBRIGHTNESS (V4L2_CID_BASE+32) > > > > #define V4L2_CID_BAND_STOP_FILTER (V4L2_CID_BASE+33) > > > > @@ -145,9 +146,10 @@ enum v4l2_colorfx { > > > > > > > > #define V4L2_CID_ALPHA_COMPONENT (V4L2_CID_BASE+41) > > > > #define V4L2_CID_COLORFX_CBCR (V4L2_CID_BASE+42) > > > > +#define V4L2_CID_COLORFX_RGB (V4L2_CID_BASE+43) > > > > > > > > /* last CID + 1 */ > > > > -#define V4L2_CID_LASTP1 (V4L2_CID_BASE+43) > > > > +#define V4L2_CID_LASTP1 (V4L2_CID_BASE+44) > > > > > > > > /* USER-class private control IDs */ > > > > > > > > @@ -221,6 +223,12 @@ enum v4l2_colorfx { > > > > */ > > > > #define V4L2_CID_USER_ALLEGRO_BASE (V4L2_CID_USER_BASE + 0x1170) > > > > > > > > +/* > > > > + * The base for the isl7998x driver controls. > > > > + * We reserve 16 controls for this driver. > > > > + */ > > > > +#define V4L2_CID_USER_ISL7998X_BASE (V4L2_CID_USER_BASE + 0x1180) > > > > + > > > > /* MPEG-class control IDs */ > > > > /* The MPEG controls are applicable to all codec controls > > > > * and the 'MPEG' part of the define is historical */ > > > > @@ -443,6 +451,11 @@ enum v4l2_mpeg_video_multi_slice_mode { > > > > #define V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES (V4L2_CID_CODEC_BASE+234) > > > > #define V4L2_CID_MPEG_VIDEO_DEC_CONCEAL_COLOR (V4L2_CID_CODEC_BASE+235) > > > > #define V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD (V4L2_CID_CODEC_BASE+236) > > > > +#define V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE (V4L2_CID_CODEC_BASE+237) > > > > +enum v4l2_mpeg_video_intra_refresh_period_type { > > > > + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM = 0, > > > > + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC = 1, > > > > +}; > > > > > > > > /* CIDs for the MPEG-2 Part 2 (H.262) codec */ > > > > #define V4L2_CID_MPEG_VIDEO_MPEG2_LEVEL (V4L2_CID_CODEC_BASE+270) > > > > @@ -1563,6 +1576,8 @@ struct v4l2_h264_dpb_entry { > > > > #define V4L2_H264_DECODE_PARAM_FLAG_IDR_PIC 0x01 > > > > #define V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC 0x02 > > > > #define V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD 0x04 > > > > +#define V4L2_H264_DECODE_PARAM_FLAG_PFRAME 0x08 > > > > +#define V4L2_H264_DECODE_PARAM_FLAG_BFRAME 0x10 > > > > > > > > #define V4L2_CID_STATELESS_H264_DECODE_PARAMS (V4L2_CID_CODEC_STATELESS_BASE + 7) > > > > /** > > > > @@ -2018,6 +2033,290 @@ struct v4l2_ctrl_hdr10_mastering_display { > > > > __u32 min_display_mastering_luminance; > > > > }; > > > > > > > > +/* Stateless VP9 controls */ > > > > + > > > > +#define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED 0x1 > > > > +#define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE 0x2 > > > > + > > > > +/** > > > > + * struct v4l2_vp9_loop_filter - VP9 loop filter parameters > > > > + * > > > > + * @ref_deltas: contains the adjustment needed for the filter level based on the > > > > + * chosen reference frame. If this syntax element is not present in the bitstream, > > > > + * users should pass its last value. > > > > + * @mode_deltas: contains the adjustment needed for the filter level based on the > > > > + * chosen mode. If this syntax element is not present in the bitstream, users should > > > > + * pass its last value. > > > > + * @level: indicates the loop filter strength. > > > > + * @sharpness: indicates the sharpness level. > > > > + * @flags: combination of V4L2_VP9_LOOP_FILTER_FLAG_{} flags. > > > > + * @reserved: padding field. Should be zeroed by applications. > > > > + * > > > > + * This structure contains all loop filter related parameters. See sections > > > > + * '7.2.8 Loop filter semantics' of the VP9 specification for more details. > > > > + */ > > > > +struct v4l2_vp9_loop_filter { > > > > + __s8 ref_deltas[4]; > > > > + __s8 mode_deltas[2]; > > > > + __u8 level; > > > > + __u8 sharpness; > > > > + __u8 flags; > > > > + __u8 reserved[7]; > > > > +}; > > > > + > > > > +/** > > > > + * struct v4l2_vp9_quantization - VP9 quantization parameters > > > > + * > > > > + * @base_q_idx: indicates the base frame qindex. > > > > + * @delta_q_y_dc: indicates the Y DC quantizer relative to base_q_idx. > > > > + * @delta_q_uv_dc: indicates the UV DC quantizer relative to base_q_idx. > > > > + * @delta_q_uv_ac: indicates the UV AC quantizer relative to base_q_idx. > > > > + * @reserved: padding field. Should be zeroed by applications. > > > > + * > > > > + * Encodes the quantization parameters. See section '7.2.9 Quantization params > > > > + * syntax' of the VP9 specification for more details. > > > > + */ > > > > +struct v4l2_vp9_quantization { > > > > + __u8 base_q_idx; > > > > + __s8 delta_q_y_dc; > > > > + __s8 delta_q_uv_dc; > > > > + __s8 delta_q_uv_ac; > > > > + __u8 reserved[4]; > > > > +}; > > > > + > > > > +#define V4L2_VP9_SEGMENTATION_FLAG_ENABLED 0x01 > > > > +#define V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP 0x02 > > > > +#define V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE 0x04 > > > > +#define V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA 0x08 > > > > +#define V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE 0x10 > > > > + > > > > +#define V4L2_VP9_SEG_LVL_ALT_Q 0 > > > > +#define V4L2_VP9_SEG_LVL_ALT_L 1 > > > > +#define V4L2_VP9_SEG_LVL_REF_FRAME 2 > > > > +#define V4L2_VP9_SEG_LVL_SKIP 3 > > > > +#define V4L2_VP9_SEG_LVL_MAX 4 > > > > + > > > > +#define V4L2_VP9_SEGMENT_FEATURE_ENABLED(id) (1 << (id)) > > > > +#define V4L2_VP9_SEGMENT_FEATURE_ENABLED_MASK 0xf > > > > + > > > > +/** > > > > + * struct v4l2_vp9_segmentation - VP9 segmentation parameters > > > > + * > > > > + * @feature_data: data attached to each feature. Data entry is only valid if > > > > + * the feature is enabled. The array shall be indexed with segment number as > > > > + * the first dimension (0..7) and one of V4L2_VP9_SEG_{} as the second dimension. > > > > + * @feature_enabled: bitmask defining which features are enabled in each segment. > > > > + * The value for each segment is a combination of V4L2_VP9_SEGMENT_FEATURE_ENABLED(id) > > > > + * values where id is one of V4L2_VP9_SEG_LVL_{}. > > > > + * @tree_probs: specifies the probability values to be used when decoding a > > > > + * Segment-ID. See '5.15. Segmentation map' section of the VP9 specification > > > > + * for more details. > > > > + * @pred_probs: specifies the probability values to be used when decoding a > > > > + * Predicted-Segment-ID. See '6.4.14. Get segment id syntax' section of :ref:`vp9` > > > > + * for more details. > > > > + * @flags: combination of V4L2_VP9_SEGMENTATION_FLAG_{} flags. > > > > + * @reserved: padding field. Should be zeroed by applications. > > > > + * > > > > + * Encodes the quantization parameters. See section '7.2.10 Segmentation params syntax' of > > > > + * the VP9 specification for more details. > > > > + */ > > > > +struct v4l2_vp9_segmentation { > > > > + __s16 feature_data[8][4]; > > > > + __u8 feature_enabled[8]; > > > > + __u8 tree_probs[7]; > > > > + __u8 pred_probs[3]; > > > > + __u8 flags; > > > > + __u8 reserved[5]; > > > > +}; > > > > + > > > > +#define V4L2_VP9_FRAME_FLAG_KEY_FRAME 0x001 > > > > +#define V4L2_VP9_FRAME_FLAG_SHOW_FRAME 0x002 > > > > +#define V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT 0x004 > > > > +#define V4L2_VP9_FRAME_FLAG_INTRA_ONLY 0x008 > > > > +#define V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV 0x010 > > > > +#define V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX 0x020 > > > > +#define V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE 0x040 > > > > +#define V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING 0x080 > > > > +#define V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING 0x100 > > > > +#define V4L2_VP9_FRAME_FLAG_COLOR_RANGE_FULL_SWING 0x200 > > > > + > > > > +#define V4L2_VP9_SIGN_BIAS_LAST 0x1 > > > > +#define V4L2_VP9_SIGN_BIAS_GOLDEN 0x2 > > > > +#define V4L2_VP9_SIGN_BIAS_ALT 0x4 > > > > + > > > > +#define V4L2_VP9_RESET_FRAME_CTX_NONE 0 > > > > +#define V4L2_VP9_RESET_FRAME_CTX_SPEC 1 > > > > +#define V4L2_VP9_RESET_FRAME_CTX_ALL 2 > > > > + > > > > +#define V4L2_VP9_INTERP_FILTER_EIGHTTAP 0 > > > > +#define V4L2_VP9_INTERP_FILTER_EIGHTTAP_SMOOTH 1 > > > > +#define V4L2_VP9_INTERP_FILTER_EIGHTTAP_SHARP 2 > > > > +#define V4L2_VP9_INTERP_FILTER_BILINEAR 3 > > > > +#define V4L2_VP9_INTERP_FILTER_SWITCHABLE 4 > > > > + > > > > +#define V4L2_VP9_REFERENCE_MODE_SINGLE_REFERENCE 0 > > > > +#define V4L2_VP9_REFERENCE_MODE_COMPOUND_REFERENCE 1 > > > > +#define V4L2_VP9_REFERENCE_MODE_SELECT 2 > > > > + > > > > +#define V4L2_VP9_PROFILE_MAX 3 > > > > + > > > > +#define V4L2_CID_STATELESS_VP9_FRAME (V4L2_CID_CODEC_STATELESS_BASE + 300) > > > > +/** > > > > + * struct v4l2_ctrl_vp9_frame - VP9 frame decoding control > > > > + * > > > > + * @lf: loop filter parameters. See &v4l2_vp9_loop_filter for more details. > > > > + * @quant: quantization parameters. See &v4l2_vp9_quantization for more details. > > > > + * @seg: segmentation parameters. See &v4l2_vp9_segmentation for more details. > > > > + * @flags: combination of V4L2_VP9_FRAME_FLAG_{} flags. > > > > + * @compressed_header_size: compressed header size in bytes. > > > > + * @uncompressed_header_size: uncompressed header size in bytes. > > > > + * @frame_width_minus_1: add 1 to it and you'll get the frame width expressed in pixels. > > > > + * @frame_height_minus_1: add 1 to it and you'll get the frame height expressed in pixels. > > > > + * @render_width_minus_1: add 1 to it and you'll get the expected render width expressed in > > > > + * pixels. This is not used during the decoding process but might be used by HW scalers > > > > + * to prepare a frame that's ready for scanout. > > > > + * @render_height_minus_1: add 1 to it and you'll get the expected render height expressed in > > > > + * pixels. This is not used during the decoding process but might be used by HW scalers > > > > + * to prepare a frame that's ready for scanout. > > > > + * @last_frame_ts: "last" reference buffer timestamp. > > > > + * The timestamp refers to the timestamp field in struct v4l2_buffer. > > > > + * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64. > > > > + * @golden_frame_ts: "golden" reference buffer timestamp. > > > > + * The timestamp refers to the timestamp field in struct v4l2_buffer. > > > > + * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64. > > > > + * @alt_frame_ts: "alt" reference buffer timestamp. > > > > + * The timestamp refers to the timestamp field in struct v4l2_buffer. > > > > + * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64. > > > > + * @ref_frame_sign_bias: a bitfield specifying whether the sign bias is set for a given > > > > + * reference frame. Either of V4L2_VP9_SIGN_BIAS_{}. > > > > + * @reset_frame_context: specifies whether the frame context should be reset to default values. > > > > + * Either of V4L2_VP9_RESET_FRAME_CTX_{}. > > > > + * @frame_context_idx: frame context that should be used/updated. > > > > + * @profile: VP9 profile. Can be 0, 1, 2 or 3. > > > > + * @bit_depth: bits per components. Can be 8, 10 or 12. Note that not all profiles support > > > > + * 10 and/or 12 bits depths. > > > > + * @interpolation_filter: specifies the filter selection used for performing inter prediction. > > > > + * Set to one of V4L2_VP9_INTERP_FILTER_{}. > > > > + * @tile_cols_log2: specifies the base 2 logarithm of the width of each tile (where the width > > > > + * is measured in units of 8x8 blocks). Shall be less than or equal to 6. > > > > + * @tile_rows_log2: specifies the base 2 logarithm of the height of each tile (where the height > > > > + * is measured in units of 8x8 blocks). > > > > + * @reference_mode: specifies the type of inter prediction to be used. > > > > + * Set to one of V4L2_VP9_REFERENCE_MODE_{}. > > > > + * @reserved: padding field. Should be zeroed by applications. > > > > + */ > > > > +struct v4l2_ctrl_vp9_frame { > > > > + struct v4l2_vp9_loop_filter lf; > > > > + struct v4l2_vp9_quantization quant; > > > > + struct v4l2_vp9_segmentation seg; > > > > + __u32 flags; > > > > + __u16 compressed_header_size; > > > > + __u16 uncompressed_header_size; > > > > + __u16 frame_width_minus_1; > > > > + __u16 frame_height_minus_1; > > > > + __u16 render_width_minus_1; > > > > + __u16 render_height_minus_1; > > > > + __u64 last_frame_ts; > > > > + __u64 golden_frame_ts; > > > > + __u64 alt_frame_ts; > > > > + __u8 ref_frame_sign_bias; > > > > + __u8 reset_frame_context; > > > > + __u8 frame_context_idx; > > > > + __u8 profile; > > > > + __u8 bit_depth; > > > > + __u8 interpolation_filter; > > > > + __u8 tile_cols_log2; > > > > + __u8 tile_rows_log2; > > > > + __u8 reference_mode; > > > > + __u8 reserved[7]; > > > > +}; > > > > + > > > > +#define V4L2_VP9_NUM_FRAME_CTX 4 > > > > + > > > > +/** > > > > + * struct v4l2_vp9_mv_probs - VP9 Motion vector probability updates > > > > + * @joint: motion vector joint probability updates. > > > > + * @sign: motion vector sign probability updates. > > > > + * @classes: motion vector class probability updates. > > > > + * @class0_bit: motion vector class0 bit probability updates. > > > > + * @bits: motion vector bits probability updates. > > > > + * @class0_fr: motion vector class0 fractional bit probability updates. > > > > + * @fr: motion vector fractional bit probability updates. > > > > + * @class0_hp: motion vector class0 high precision fractional bit probability updates. > > > > + * @hp: motion vector high precision fractional bit probability updates. > > > > + * > > > > + * This structure contains new values of motion vector probabilities. > > > > + * A value of zero in an array element means there is no update of the relevant probability. > > > > + * See `struct v4l2_vp9_prob_updates` for details. > > > > + */ > > > > +struct v4l2_vp9_mv_probs { > > > > + __u8 joint[3]; > > > > + __u8 sign[2]; > > > > + __u8 classes[2][10]; > > > > + __u8 class0_bit[2]; > > > > + __u8 bits[2][10]; > > > > + __u8 class0_fr[2][2][3]; > > > > + __u8 fr[2][3]; > > > > + __u8 class0_hp[2]; > > > > + __u8 hp[2]; > > > > +}; > > > > + > > > > +#define V4L2_CID_STATELESS_VP9_COMPRESSED_HDR (V4L2_CID_CODEC_STATELESS_BASE + 301) > > > > + > > > > +#define V4L2_VP9_TX_MODE_ONLY_4X4 0 > > > > +#define V4L2_VP9_TX_MODE_ALLOW_8X8 1 > > > > +#define V4L2_VP9_TX_MODE_ALLOW_16X16 2 > > > > +#define V4L2_VP9_TX_MODE_ALLOW_32X32 3 > > > > +#define V4L2_VP9_TX_MODE_SELECT 4 > > > > + > > > > +/** > > > > + * struct v4l2_ctrl_vp9_compressed_hdr - VP9 probability updates control > > > > + * @tx_mode: specifies the TX mode. Set to one of V4L2_VP9_TX_MODE_{}. > > > > + * @tx8: TX 8x8 probability updates. > > > > + * @tx16: TX 16x16 probability updates. > > > > + * @tx32: TX 32x32 probability updates. > > > > + * @coef: coefficient probability updates. > > > > + * @skip: skip probability updates. > > > > + * @inter_mode: inter mode probability updates. > > > > + * @interp_filter: interpolation filter probability updates. > > > > + * @is_inter: is inter-block probability updates. > > > > + * @comp_mode: compound prediction mode probability updates. > > > > + * @single_ref: single ref probability updates. > > > > + * @comp_ref: compound ref probability updates. > > > > + * @y_mode: Y prediction mode probability updates. > > > > + * @uv_mode: UV prediction mode probability updates. > > > > + * @partition: partition probability updates. > > > > + * @mv: motion vector probability updates. > > > > + * > > > > + * This structure holds the probabilities update as parsed in the compressed > > > > + * header (Spec 6.3). These values represent the value of probability update after > > > > + * being translated with inv_map_table[] (see 6.3.5). A value of zero in an array element > > > > + * means that there is no update of the relevant probability. > > > > + * > > > > + * This control is optional and needs to be used when dealing with the hardware which is > > > > + * not capable of parsing the compressed header itself. Only drivers which need it will > > > > + * implement it. > > > > + */ > > > > +struct v4l2_ctrl_vp9_compressed_hdr { > > > > + __u8 tx_mode; > > > > + __u8 tx8[2][1]; > > > > + __u8 tx16[2][2]; > > > > + __u8 tx32[2][3]; > > > > + __u8 coef[4][2][2][6][6][3]; > > > > + __u8 skip[3]; > > > > + __u8 inter_mode[7][3]; > > > > + __u8 interp_filter[4][2]; > > > > + __u8 is_inter[4]; > > > > + __u8 comp_mode[5]; > > > > + __u8 single_ref[5][2]; > > > > + __u8 comp_ref[5]; > > > > + __u8 y_mode[4][9]; > > > > + __u8 uv_mode[10][9]; > > > > + __u8 partition[16][3]; > > > > + > > > > + struct v4l2_vp9_mv_probs mv; > > > > +}; > > > > + > > > > /* MPEG-compression definitions kept for backwards compatibility */ > > > > #define V4L2_CTRL_CLASS_MPEG V4L2_CTRL_CLASS_CODEC > > > > #define V4L2_CID_MPEG_CLASS V4L2_CID_CODEC_CLASS > > > > diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h > > > > index dcc0b01dfa9a..6e3d58e5a5c4 100644 > > > > --- a/include/linux/videodev2.h > > > > +++ b/include/linux/videodev2.h > > > > @@ -563,6 +563,7 @@ struct v4l2_pix_format { > > > > /* Grey bit-packed formats */ > > > > #define V4L2_PIX_FMT_Y10BPACK v4l2_fourcc('Y', '1', '0', 'B') /* 10 Greyscale bit-packed */ > > > > #define V4L2_PIX_FMT_Y10P v4l2_fourcc('Y', '1', '0', 'P') /* 10 Greyscale, MIPI RAW10 packed */ > > > > +#define V4L2_PIX_FMT_IPU3_Y10 v4l2_fourcc('i', 'p', '3', 'y') /* IPU3 packed 10-bit greyscale */ > > > > > > > > /* Palette formats */ > > > > #define V4L2_PIX_FMT_PAL8 v4l2_fourcc('P', 'A', 'L', '8') /* 8 8-bit palette */ > > > > @@ -626,6 +627,8 @@ struct v4l2_pix_format { > > > > /* Tiled YUV formats, non contiguous planes */ > > > > #define V4L2_PIX_FMT_NV12MT v4l2_fourcc('T', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 64x32 tiles */ > > > > #define V4L2_PIX_FMT_NV12MT_16X16 v4l2_fourcc('V', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 16x16 tiles */ > > > > +#define V4L2_PIX_FMT_NV12M_8L128 v4l2_fourcc('N', 'A', '1', '2') /* Y/CbCr 4:2:0 8x128 tiles */ > > > > +#define V4L2_PIX_FMT_NV12M_10BE_8L128 v4l2_fourcc_be('N', 'T', '1', '2') /* Y/CbCr 4:2:0 10-bit 8x128 tiles */ > > > > > > > > /* Bayer formats - see http://www.siliconimaging.com/RGB%20Bayer.htm */ > > > > #define V4L2_PIX_FMT_SBGGR8 v4l2_fourcc('B', 'A', '8', '1') /* 8 BGBG.. GRGR.. */ > > > > @@ -697,6 +700,7 @@ struct v4l2_pix_format { > > > > #define V4L2_PIX_FMT_VP8 v4l2_fourcc('V', 'P', '8', '0') /* VP8 */ > > > > #define V4L2_PIX_FMT_VP8_FRAME v4l2_fourcc('V', 'P', '8', 'F') /* VP8 parsed frame */ > > > > #define V4L2_PIX_FMT_VP9 v4l2_fourcc('V', 'P', '9', '0') /* VP9 */ > > > > +#define V4L2_PIX_FMT_VP9_FRAME v4l2_fourcc('V', 'P', '9', 'F') /* VP9 parsed frame */ > > > > #define V4L2_PIX_FMT_HEVC v4l2_fourcc('H', 'E', 'V', 'C') /* HEVC aka H.265 */ > > > > #define V4L2_PIX_FMT_FWHT v4l2_fourcc('F', 'W', 'H', 'T') /* Fast Walsh Hadamard Transform (vicodec) */ > > > > #define V4L2_PIX_FMT_FWHT_STATELESS v4l2_fourcc('S', 'F', 'W', 'H') /* Stateless FWHT (vicodec) */ > > > > @@ -737,8 +741,10 @@ struct v4l2_pix_format { > > > > #define V4L2_PIX_FMT_INZI v4l2_fourcc('I', 'N', 'Z', 'I') /* Intel Planar Greyscale 10-bit and Depth 16-bit */ > > > > #define V4L2_PIX_FMT_CNF4 v4l2_fourcc('C', 'N', 'F', '4') /* Intel 4-bit packed depth confidence information */ > > > > #define V4L2_PIX_FMT_HI240 v4l2_fourcc('H', 'I', '2', '4') /* BTTV 8-bit dithered RGB */ > > > > +#define V4L2_PIX_FMT_QC08C v4l2_fourcc('Q', '0', '8', 'C') /* Qualcomm 8-bit compressed */ > > > > +#define V4L2_PIX_FMT_QC10C v4l2_fourcc('Q', '1', '0', 'C') /* Qualcomm 10-bit compressed */ > > > > > > > > -/* 10bit raw bayer packed, 32 bytes for every 25 pixels, last LSB 6 bits unused */ > > > > +/* 10bit raw packed, 32 bytes for every 25 pixels, last LSB 6 bits unused */ > > > > #define V4L2_PIX_FMT_IPU3_SBGGR10 v4l2_fourcc('i', 'p', '3', 'b') /* IPU3 packed 10-bit BGGR bayer */ > > > > #define V4L2_PIX_FMT_IPU3_SGBRG10 v4l2_fourcc('i', 'p', '3', 'g') /* IPU3 packed 10-bit GBRG bayer */ > > > > #define V4L2_PIX_FMT_IPU3_SGRBG10 v4l2_fourcc('i', 'p', '3', 'G') /* IPU3 packed 10-bit GRBG bayer */ > > > > @@ -1732,6 +1738,8 @@ struct v4l2_ext_control { > > > > struct v4l2_ctrl_mpeg2_sequence *p_mpeg2_sequence; > > > > struct v4l2_ctrl_mpeg2_picture *p_mpeg2_picture; > > > > struct v4l2_ctrl_mpeg2_quantisation *p_mpeg2_quantisation; > > > > + struct v4l2_ctrl_vp9_compressed_hdr *p_vp9_compressed_hdr_probs; > > > > + struct v4l2_ctrl_vp9_frame *p_vp9_frame; > > > > void *ptr; > > > > }; > > > > } __attribute__ ((packed)); > > > > @@ -1792,6 +1800,9 @@ enum v4l2_ctrl_type { > > > > V4L2_CTRL_TYPE_MPEG2_QUANTISATION = 0x0250, > > > > V4L2_CTRL_TYPE_MPEG2_SEQUENCE = 0x0251, > > > > V4L2_CTRL_TYPE_MPEG2_PICTURE = 0x0252, > > > > + > > > > + V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR = 0x0260, > > > > + V4L2_CTRL_TYPE_VP9_FRAME = 0x0261, > > > > }; > > > > > > > > /* Used in the VIDIOC_QUERYCTRL ioctl for querying controls */
Quoting Laurent Pinchart via libcamera-devel (2022-08-02 11:21:23) > Hi Jacopo, > > On Tue, Aug 02, 2022 at 09:52:08AM +0200, Jacopo Mondi wrote: > > On Mon, Aug 01, 2022 at 10:47:04PM +0300, Laurent Pinchart wrote: > > > On Mon, Aug 01, 2022 at 05:16:29PM +0200, Jacopo Mondi wrote: > > > > On Mon, Aug 01, 2022 at 03:05:31AM +0300, Laurent Pinchart via libcamera-devel wrote: > > > > > Update kernel headers to v5.19 using utils/update-kernel-headers.sh and > > > > > re-instating libcamera local modifications. > > > > > > > > Don't we need something better than this ? > > > > > > > > should we regularly rebase the libcamera-changes on top of a new > > > > header export per each kernel release ? > > > > > > > > Otherwise updating headers and re-applying the local modifications in > > > > one go makes it impossible to actually track what's local and what's > > > > upstream ? > > > > > > This patch was possibly easier to generate than it is to review. The > > > update-kernel-headers.sh script undoes all the local changes, and I've > > > then used git add -p to avoid picking up the reverts. This is a manual > > > process that can lead to errors. > > > > The error-proness is what I'm concerned with > > > > > On the review side, it's really about making sure that the update > > > doesn't drop any of the features we depend on. It may seem error-prone > > > too, but most (not all though) of the local changes we carry will be > > > detected at compilation time of reverted. > > > > True that > > > > > The best way to avoid all this is of course to upstream all the changes, > > > and that's something we keep working on, with various delays depending > > > on the features. For instance, patches 02/13 and 03/13 in this series > > > will effectively disappear once we upgrade to the v5.20 kernel headers. > > > Other changes take longer to upstream. > > > > > > I'm open to other ideas to improve the process, but completely > > > overwriting the headers and then reapplying local changes on top will > > > break compilation during bisection. > > > > I can only suggest to do that on the side and compare the output. > > But that's a suggestion for review more than for development. > > We could indeed post the change as two patches, one that overwrites > everything, and the second one that reapplies our local changes, and > squash when pushing. I wouldn't even squash. We could simply keep re-cherry-picking the add-on commits. That would make it clear that the import overwrites the additions, and then we clearly bring them back in reviewable chunks 'on top' of the latest kernel headers. -- Kieran > > > > > > Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > > > > > --- > > > > > include/linux/README | 2 +- > > > > > include/linux/dma-buf.h | 4 +- > > > > > include/linux/drm_fourcc.h | 86 +++++++++- > > > > > include/linux/intel-ipu3.h | 35 ++-- > > > > > include/linux/v4l2-controls.h | 301 +++++++++++++++++++++++++++++++++- > > > > > include/linux/videodev2.h | 13 +- > > > > > 6 files changed, 418 insertions(+), 23 deletions(-) > > > > > > > > > > diff --git a/include/linux/README b/include/linux/README > > > > > index 4e314b9820ce..9f61517a119a 100644 > > > > > --- a/include/linux/README > > > > > +++ b/include/linux/README > > > > > @@ -1,4 +1,4 @@ > > > > > # SPDX-License-Identifier: CC0-1.0 > > > > > > > > > > -Files in this directory are imported from v5.16-rc7 of the Linux kernel. Do not > > > > > +Files in this directory are imported from v5.19 of the Linux kernel. Do not > > > > > modify them manually. > > > > > diff --git a/include/linux/dma-buf.h b/include/linux/dma-buf.h > > > > > index 8e4a2ca0bcbf..b1523cb8ab30 100644 > > > > > --- a/include/linux/dma-buf.h > > > > > +++ b/include/linux/dma-buf.h > > > > > @@ -92,7 +92,7 @@ struct dma_buf_sync { > > > > > * between them in actual uapi, they're just different numbers. > > > > > */ > > > > > #define DMA_BUF_SET_NAME _IOW(DMA_BUF_BASE, 1, const char *) > > > > > -#define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, u32) > > > > > -#define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, u64) > > > > > +#define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, __u32) > > > > > +#define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, __u64) > > > > > > > > > > #endif > > > > > diff --git a/include/linux/drm_fourcc.h b/include/linux/drm_fourcc.h > > > > > index ea11dcb405e5..cc69eecc606f 100644 > > > > > --- a/include/linux/drm_fourcc.h > > > > > +++ b/include/linux/drm_fourcc.h > > > > > @@ -314,6 +314,13 @@ extern "C" { > > > > > */ > > > > > #define DRM_FORMAT_P016 fourcc_code('P', '0', '1', '6') /* 2x2 subsampled Cr:Cb plane 16 bits per channel */ > > > > > > > > > > +/* 2 plane YCbCr420. > > > > > + * 3 10 bit components and 2 padding bits packed into 4 bytes. > > > > > + * index 0 = Y plane, [31:0] x:Y2:Y1:Y0 2:10:10:10 little endian > > > > > + * index 1 = Cr:Cb plane, [63:0] x:Cr2:Cb2:Cr1:x:Cb1:Cr0:Cb0 [2:10:10:10:2:10:10:10] little endian > > > > > + */ > > > > > +#define DRM_FORMAT_P030 fourcc_code('P', '0', '3', '0') /* 2x2 subsampled Cr:Cb plane 10 bits per channel packed */ > > > > > + > > > > > /* 3 plane non-subsampled (444) YCbCr > > > > > * 16 bits per component, but only 10 bits are used and 6 bits are padded > > > > > * index 0: Y plane, [15:0] Y:x [10:6] little endian > > > > > @@ -630,6 +637,53 @@ extern "C" { > > > > > */ > > > > > #define I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC fourcc_mod_code(INTEL, 8) > > > > > > > > > > +/* > > > > > + * Intel Tile 4 layout > > > > > + * > > > > > + * This is a tiled layout using 4KB tiles in a row-major layout. It has the same > > > > > + * shape as Tile Y at two granularities: 4KB (128B x 32) and 64B (16B x 4). It > > > > > + * only differs from Tile Y at the 256B granularity in between. At this > > > > > + * granularity, Tile Y has a shape of 16B x 32 rows, but this tiling has a shape > > > > > + * of 64B x 8 rows. > > > > > + */ > > > > > +#define I915_FORMAT_MOD_4_TILED fourcc_mod_code(INTEL, 9) > > > > > + > > > > > +/* > > > > > + * Intel color control surfaces (CCS) for DG2 render compression. > > > > > + * > > > > > + * The main surface is Tile 4 and at plane index 0. The CCS data is stored > > > > > + * outside of the GEM object in a reserved memory area dedicated for the > > > > > + * storage of the CCS data for all RC/RC_CC/MC compressible GEM objects. The > > > > > + * main surface pitch is required to be a multiple of four Tile 4 widths. > > > > > + */ > > > > > +#define I915_FORMAT_MOD_4_TILED_DG2_RC_CCS fourcc_mod_code(INTEL, 10) > > > > > + > > > > > +/* > > > > > + * Intel color control surfaces (CCS) for DG2 media compression. > > > > > + * > > > > > + * The main surface is Tile 4 and at plane index 0. For semi-planar formats > > > > > + * like NV12, the Y and UV planes are Tile 4 and are located at plane indices > > > > > + * 0 and 1, respectively. The CCS for all planes are stored outside of the > > > > > + * GEM object in a reserved memory area dedicated for the storage of the > > > > > + * CCS data for all RC/RC_CC/MC compressible GEM objects. The main surface > > > > > + * pitch is required to be a multiple of four Tile 4 widths. > > > > > + */ > > > > > +#define I915_FORMAT_MOD_4_TILED_DG2_MC_CCS fourcc_mod_code(INTEL, 11) > > > > > + > > > > > +/* > > > > > + * Intel Color Control Surface with Clear Color (CCS) for DG2 render compression. > > > > > + * > > > > > + * The main surface is Tile 4 and at plane index 0. The CCS data is stored > > > > > + * outside of the GEM object in a reserved memory area dedicated for the > > > > > + * storage of the CCS data for all RC/RC_CC/MC compressible GEM objects. The > > > > > + * main surface pitch is required to be a multiple of four Tile 4 widths. The > > > > > + * clear color is stored at plane index 1 and the pitch should be ignored. The > > > > > + * format of the 256 bits of clear color data matches the one used for the > > > > > + * I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC modifier, see its description > > > > > + * for details. > > > > > + */ > > > > > +#define I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC fourcc_mod_code(INTEL, 12) > > > > > + > > > > > /* > > > > > * IPU3 Bayer packing layout > > > > > * > > > > > @@ -638,7 +692,7 @@ extern "C" { > > > > > * the 6 most significant bits in the last byte unused. The format is little > > > > > * endian. > > > > > */ > > > > > -#define IPU3_FORMAT_MOD_PACKED fourcc_mod_code(INTEL, 9) > > > > > +#define IPU3_FORMAT_MOD_PACKED fourcc_mod_code(INTEL, 13) > > > > > > > > > > /* > > > > > * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks > > > > > @@ -677,6 +731,28 @@ extern "C" { > > > > > */ > > > > > #define DRM_FORMAT_MOD_QCOM_COMPRESSED fourcc_mod_code(QCOM, 1) > > > > > > > > > > +/* > > > > > + * Qualcomm Tiled Format > > > > > + * > > > > > + * Similar to DRM_FORMAT_MOD_QCOM_COMPRESSED but not compressed. > > > > > + * Implementation may be platform and base-format specific. > > > > > + * > > > > > + * Each macrotile consists of m x n (mostly 4 x 4) tiles. > > > > > + * Pixel data pitch/stride is aligned with macrotile width. > > > > > + * Pixel data height is aligned with macrotile height. > > > > > + * Entire pixel data buffer is aligned with 4k(bytes). > > > > > + */ > > > > > +#define DRM_FORMAT_MOD_QCOM_TILED3 fourcc_mod_code(QCOM, 3) > > > > > + > > > > > +/* > > > > > + * Qualcomm Alternate Tiled Format > > > > > + * > > > > > + * Alternate tiled format typically only used within GMEM. > > > > > + * Implementation may be platform and base-format specific. > > > > > + */ > > > > > +#define DRM_FORMAT_MOD_QCOM_TILED2 fourcc_mod_code(QCOM, 2) > > > > > + > > > > > + > > > > > /* Vivante framebuffer modifiers */ > > > > > > > > > > /* > > > > > @@ -929,6 +1005,10 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) > > > > > * and UV. Some SAND-using hardware stores UV in a separate tiled > > > > > * image from Y to reduce the column height, which is not supported > > > > > * with these modifiers. > > > > > + * > > > > > + * The DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT modifier is also > > > > > + * supported for DRM_FORMAT_P030 where the columns remain as 128 bytes > > > > > + * wide, but as this is a 10 bpp format that translates to 96 pixels. > > > > > */ > > > > > > > > > > #define DRM_FORMAT_MOD_BROADCOM_SAND32_COL_HEIGHT(v) \ > > > > > @@ -1439,11 +1519,11 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) > > > > > #define AMD_FMT_MOD_PIPE_MASK 0x7 > > > > > > > > > > #define AMD_FMT_MOD_SET(field, value) \ > > > > > - ((uint64_t)(value) << AMD_FMT_MOD_##field##_SHIFT) > > > > > + ((__u64)(value) << AMD_FMT_MOD_##field##_SHIFT) > > > > > #define AMD_FMT_MOD_GET(field, value) \ > > > > > (((value) >> AMD_FMT_MOD_##field##_SHIFT) & AMD_FMT_MOD_##field##_MASK) > > > > > #define AMD_FMT_MOD_CLEAR(field) \ > > > > > - (~((uint64_t)AMD_FMT_MOD_##field##_MASK << AMD_FMT_MOD_##field##_SHIFT)) > > > > > + (~((__u64)AMD_FMT_MOD_##field##_MASK << AMD_FMT_MOD_##field##_SHIFT)) > > > > > > > > > > /* Mobile Industry Processor Interface (MIPI) modifiers */ > > > > > > > > > > diff --git a/include/linux/intel-ipu3.h b/include/linux/intel-ipu3.h > > > > > index f30dce43d1d8..5c298ec557fa 100644 > > > > > --- a/include/linux/intel-ipu3.h > > > > > +++ b/include/linux/intel-ipu3.h > > > > > @@ -34,11 +34,17 @@ > > > > > * struct ipu3_uapi_grid_config - Grid plane config > > > > > * > > > > > * @width: Grid horizontal dimensions, in number of grid blocks(cells). > > > > > + * For AWB, the range is (16, 80). > > > > > + * For AF/AE, the range is (16, 32). > > > > > * @height: Grid vertical dimensions, in number of grid cells. > > > > > + * For AWB, the range is (16, 60). > > > > > + * For AF/AE, the range is (16, 24). > > > > > * @block_width_log2: Log2 of the width of each cell in pixels. > > > > > - * for (2^3, 2^4, 2^5, 2^6, 2^7), values [3, 7]. > > > > > + * For AWB, the range is [3, 6]. > > > > > + * For AF/AE, the range is [3, 7]. > > > > > * @block_height_log2: Log2 of the height of each cell in pixels. > > > > > - * for (2^3, 2^4, 2^5, 2^6, 2^7), values [3, 7]. > > > > > + * For AWB, the range is [3, 6]. > > > > > + * For AF/AE, the range is [3, 7]. > > > > > * @height_per_slice: The number of blocks in vertical axis per slice. > > > > > * Default 2. > > > > > * @x_start: X value of top left corner of Region of Interest(ROI). > > > > > @@ -68,21 +74,21 @@ struct ipu3_uapi_grid_config { > > > > > * @R_avg: Red average in the cell. > > > > > * @B_avg: Blue average in the cell. > > > > > * @Gb_avg: Green average for blue lines in the cell. > > > > > - * @sat_ratio: Percentage of pixels over a given threshold set in > > > > > + * @sat_ratio: Percentage of pixels over the thresholds specified in > > > > > * ipu3_uapi_awb_config_s, coded from 0 to 255. > > > > > - * @padding0: Unused byte for padding. > > > > > - * @padding1: Unused byte for padding. > > > > > - * @padding2: Unused byte for padding. > > > > > + * @padding0: Unused byte for padding. > > > > > + * @padding1: Unused byte for padding. > > > > > + * @padding2: Unused byte for padding. > > > > > */ > > > > > struct ipu3_uapi_awb_set_item { > > > > > - unsigned char Gr_avg; > > > > > - unsigned char R_avg; > > > > > - unsigned char B_avg; > > > > > - unsigned char Gb_avg; > > > > > - unsigned char sat_ratio; > > > > > - unsigned char padding0; > > > > > - unsigned char padding1; > > > > > - unsigned char padding2; > > > > > + __u8 Gr_avg; > > > > > + __u8 R_avg; > > > > > + __u8 B_avg; > > > > > + __u8 Gb_avg; > > > > > + __u8 sat_ratio; > > > > > + __u8 padding0; > > > > > + __u8 padding1; > > > > > + __u8 padding2; > > > > > } __attribute__((packed)); > > > > > > > > > > /* > > > > > @@ -98,7 +104,6 @@ struct ipu3_uapi_awb_set_item { > > > > > (IPU3_UAPI_AWB_MAX_SETS * \ > > > > > (IPU3_UAPI_AWB_SET_SIZE + IPU3_UAPI_AWB_SPARE_FOR_BUBBLES)) > > > > > > > > > > - > > > > > /** > > > > > * struct ipu3_uapi_awb_raw_buffer - AWB raw buffer > > > > > * > > > > > diff --git a/include/linux/v4l2-controls.h b/include/linux/v4l2-controls.h > > > > > index a055d2576253..9d2a8237e712 100644 > > > > > --- a/include/linux/v4l2-controls.h > > > > > +++ b/include/linux/v4l2-controls.h > > > > > @@ -128,6 +128,7 @@ enum v4l2_colorfx { > > > > > V4L2_COLORFX_SOLARIZATION = 13, > > > > > V4L2_COLORFX_ANTIQUE = 14, > > > > > V4L2_COLORFX_SET_CBCR = 15, > > > > > + V4L2_COLORFX_SET_RGB = 16, > > > > > }; > > > > > #define V4L2_CID_AUTOBRIGHTNESS (V4L2_CID_BASE+32) > > > > > #define V4L2_CID_BAND_STOP_FILTER (V4L2_CID_BASE+33) > > > > > @@ -145,9 +146,10 @@ enum v4l2_colorfx { > > > > > > > > > > #define V4L2_CID_ALPHA_COMPONENT (V4L2_CID_BASE+41) > > > > > #define V4L2_CID_COLORFX_CBCR (V4L2_CID_BASE+42) > > > > > +#define V4L2_CID_COLORFX_RGB (V4L2_CID_BASE+43) > > > > > > > > > > /* last CID + 1 */ > > > > > -#define V4L2_CID_LASTP1 (V4L2_CID_BASE+43) > > > > > +#define V4L2_CID_LASTP1 (V4L2_CID_BASE+44) > > > > > > > > > > /* USER-class private control IDs */ > > > > > > > > > > @@ -221,6 +223,12 @@ enum v4l2_colorfx { > > > > > */ > > > > > #define V4L2_CID_USER_ALLEGRO_BASE (V4L2_CID_USER_BASE + 0x1170) > > > > > > > > > > +/* > > > > > + * The base for the isl7998x driver controls. > > > > > + * We reserve 16 controls for this driver. > > > > > + */ > > > > > +#define V4L2_CID_USER_ISL7998X_BASE (V4L2_CID_USER_BASE + 0x1180) > > > > > + > > > > > /* MPEG-class control IDs */ > > > > > /* The MPEG controls are applicable to all codec controls > > > > > * and the 'MPEG' part of the define is historical */ > > > > > @@ -443,6 +451,11 @@ enum v4l2_mpeg_video_multi_slice_mode { > > > > > #define V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES (V4L2_CID_CODEC_BASE+234) > > > > > #define V4L2_CID_MPEG_VIDEO_DEC_CONCEAL_COLOR (V4L2_CID_CODEC_BASE+235) > > > > > #define V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD (V4L2_CID_CODEC_BASE+236) > > > > > +#define V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE (V4L2_CID_CODEC_BASE+237) > > > > > +enum v4l2_mpeg_video_intra_refresh_period_type { > > > > > + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM = 0, > > > > > + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC = 1, > > > > > +}; > > > > > > > > > > /* CIDs for the MPEG-2 Part 2 (H.262) codec */ > > > > > #define V4L2_CID_MPEG_VIDEO_MPEG2_LEVEL (V4L2_CID_CODEC_BASE+270) > > > > > @@ -1563,6 +1576,8 @@ struct v4l2_h264_dpb_entry { > > > > > #define V4L2_H264_DECODE_PARAM_FLAG_IDR_PIC 0x01 > > > > > #define V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC 0x02 > > > > > #define V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD 0x04 > > > > > +#define V4L2_H264_DECODE_PARAM_FLAG_PFRAME 0x08 > > > > > +#define V4L2_H264_DECODE_PARAM_FLAG_BFRAME 0x10 > > > > > > > > > > #define V4L2_CID_STATELESS_H264_DECODE_PARAMS (V4L2_CID_CODEC_STATELESS_BASE + 7) > > > > > /** > > > > > @@ -2018,6 +2033,290 @@ struct v4l2_ctrl_hdr10_mastering_display { > > > > > __u32 min_display_mastering_luminance; > > > > > }; > > > > > > > > > > +/* Stateless VP9 controls */ > > > > > + > > > > > +#define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED 0x1 > > > > > +#define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE 0x2 > > > > > + > > > > > +/** > > > > > + * struct v4l2_vp9_loop_filter - VP9 loop filter parameters > > > > > + * > > > > > + * @ref_deltas: contains the adjustment needed for the filter level based on the > > > > > + * chosen reference frame. If this syntax element is not present in the bitstream, > > > > > + * users should pass its last value. > > > > > + * @mode_deltas: contains the adjustment needed for the filter level based on the > > > > > + * chosen mode. If this syntax element is not present in the bitstream, users should > > > > > + * pass its last value. > > > > > + * @level: indicates the loop filter strength. > > > > > + * @sharpness: indicates the sharpness level. > > > > > + * @flags: combination of V4L2_VP9_LOOP_FILTER_FLAG_{} flags. > > > > > + * @reserved: padding field. Should be zeroed by applications. > > > > > + * > > > > > + * This structure contains all loop filter related parameters. See sections > > > > > + * '7.2.8 Loop filter semantics' of the VP9 specification for more details. > > > > > + */ > > > > > +struct v4l2_vp9_loop_filter { > > > > > + __s8 ref_deltas[4]; > > > > > + __s8 mode_deltas[2]; > > > > > + __u8 level; > > > > > + __u8 sharpness; > > > > > + __u8 flags; > > > > > + __u8 reserved[7]; > > > > > +}; > > > > > + > > > > > +/** > > > > > + * struct v4l2_vp9_quantization - VP9 quantization parameters > > > > > + * > > > > > + * @base_q_idx: indicates the base frame qindex. > > > > > + * @delta_q_y_dc: indicates the Y DC quantizer relative to base_q_idx. > > > > > + * @delta_q_uv_dc: indicates the UV DC quantizer relative to base_q_idx. > > > > > + * @delta_q_uv_ac: indicates the UV AC quantizer relative to base_q_idx. > > > > > + * @reserved: padding field. Should be zeroed by applications. > > > > > + * > > > > > + * Encodes the quantization parameters. See section '7.2.9 Quantization params > > > > > + * syntax' of the VP9 specification for more details. > > > > > + */ > > > > > +struct v4l2_vp9_quantization { > > > > > + __u8 base_q_idx; > > > > > + __s8 delta_q_y_dc; > > > > > + __s8 delta_q_uv_dc; > > > > > + __s8 delta_q_uv_ac; > > > > > + __u8 reserved[4]; > > > > > +}; > > > > > + > > > > > +#define V4L2_VP9_SEGMENTATION_FLAG_ENABLED 0x01 > > > > > +#define V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP 0x02 > > > > > +#define V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE 0x04 > > > > > +#define V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA 0x08 > > > > > +#define V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE 0x10 > > > > > + > > > > > +#define V4L2_VP9_SEG_LVL_ALT_Q 0 > > > > > +#define V4L2_VP9_SEG_LVL_ALT_L 1 > > > > > +#define V4L2_VP9_SEG_LVL_REF_FRAME 2 > > > > > +#define V4L2_VP9_SEG_LVL_SKIP 3 > > > > > +#define V4L2_VP9_SEG_LVL_MAX 4 > > > > > + > > > > > +#define V4L2_VP9_SEGMENT_FEATURE_ENABLED(id) (1 << (id)) > > > > > +#define V4L2_VP9_SEGMENT_FEATURE_ENABLED_MASK 0xf > > > > > + > > > > > +/** > > > > > + * struct v4l2_vp9_segmentation - VP9 segmentation parameters > > > > > + * > > > > > + * @feature_data: data attached to each feature. Data entry is only valid if > > > > > + * the feature is enabled. The array shall be indexed with segment number as > > > > > + * the first dimension (0..7) and one of V4L2_VP9_SEG_{} as the second dimension. > > > > > + * @feature_enabled: bitmask defining which features are enabled in each segment. > > > > > + * The value for each segment is a combination of V4L2_VP9_SEGMENT_FEATURE_ENABLED(id) > > > > > + * values where id is one of V4L2_VP9_SEG_LVL_{}. > > > > > + * @tree_probs: specifies the probability values to be used when decoding a > > > > > + * Segment-ID. See '5.15. Segmentation map' section of the VP9 specification > > > > > + * for more details. > > > > > + * @pred_probs: specifies the probability values to be used when decoding a > > > > > + * Predicted-Segment-ID. See '6.4.14. Get segment id syntax' section of :ref:`vp9` > > > > > + * for more details. > > > > > + * @flags: combination of V4L2_VP9_SEGMENTATION_FLAG_{} flags. > > > > > + * @reserved: padding field. Should be zeroed by applications. > > > > > + * > > > > > + * Encodes the quantization parameters. See section '7.2.10 Segmentation params syntax' of > > > > > + * the VP9 specification for more details. > > > > > + */ > > > > > +struct v4l2_vp9_segmentation { > > > > > + __s16 feature_data[8][4]; > > > > > + __u8 feature_enabled[8]; > > > > > + __u8 tree_probs[7]; > > > > > + __u8 pred_probs[3]; > > > > > + __u8 flags; > > > > > + __u8 reserved[5]; > > > > > +}; > > > > > + > > > > > +#define V4L2_VP9_FRAME_FLAG_KEY_FRAME 0x001 > > > > > +#define V4L2_VP9_FRAME_FLAG_SHOW_FRAME 0x002 > > > > > +#define V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT 0x004 > > > > > +#define V4L2_VP9_FRAME_FLAG_INTRA_ONLY 0x008 > > > > > +#define V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV 0x010 > > > > > +#define V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX 0x020 > > > > > +#define V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE 0x040 > > > > > +#define V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING 0x080 > > > > > +#define V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING 0x100 > > > > > +#define V4L2_VP9_FRAME_FLAG_COLOR_RANGE_FULL_SWING 0x200 > > > > > + > > > > > +#define V4L2_VP9_SIGN_BIAS_LAST 0x1 > > > > > +#define V4L2_VP9_SIGN_BIAS_GOLDEN 0x2 > > > > > +#define V4L2_VP9_SIGN_BIAS_ALT 0x4 > > > > > + > > > > > +#define V4L2_VP9_RESET_FRAME_CTX_NONE 0 > > > > > +#define V4L2_VP9_RESET_FRAME_CTX_SPEC 1 > > > > > +#define V4L2_VP9_RESET_FRAME_CTX_ALL 2 > > > > > + > > > > > +#define V4L2_VP9_INTERP_FILTER_EIGHTTAP 0 > > > > > +#define V4L2_VP9_INTERP_FILTER_EIGHTTAP_SMOOTH 1 > > > > > +#define V4L2_VP9_INTERP_FILTER_EIGHTTAP_SHARP 2 > > > > > +#define V4L2_VP9_INTERP_FILTER_BILINEAR 3 > > > > > +#define V4L2_VP9_INTERP_FILTER_SWITCHABLE 4 > > > > > + > > > > > +#define V4L2_VP9_REFERENCE_MODE_SINGLE_REFERENCE 0 > > > > > +#define V4L2_VP9_REFERENCE_MODE_COMPOUND_REFERENCE 1 > > > > > +#define V4L2_VP9_REFERENCE_MODE_SELECT 2 > > > > > + > > > > > +#define V4L2_VP9_PROFILE_MAX 3 > > > > > + > > > > > +#define V4L2_CID_STATELESS_VP9_FRAME (V4L2_CID_CODEC_STATELESS_BASE + 300) > > > > > +/** > > > > > + * struct v4l2_ctrl_vp9_frame - VP9 frame decoding control > > > > > + * > > > > > + * @lf: loop filter parameters. See &v4l2_vp9_loop_filter for more details. > > > > > + * @quant: quantization parameters. See &v4l2_vp9_quantization for more details. > > > > > + * @seg: segmentation parameters. See &v4l2_vp9_segmentation for more details. > > > > > + * @flags: combination of V4L2_VP9_FRAME_FLAG_{} flags. > > > > > + * @compressed_header_size: compressed header size in bytes. > > > > > + * @uncompressed_header_size: uncompressed header size in bytes. > > > > > + * @frame_width_minus_1: add 1 to it and you'll get the frame width expressed in pixels. > > > > > + * @frame_height_minus_1: add 1 to it and you'll get the frame height expressed in pixels. > > > > > + * @render_width_minus_1: add 1 to it and you'll get the expected render width expressed in > > > > > + * pixels. This is not used during the decoding process but might be used by HW scalers > > > > > + * to prepare a frame that's ready for scanout. > > > > > + * @render_height_minus_1: add 1 to it and you'll get the expected render height expressed in > > > > > + * pixels. This is not used during the decoding process but might be used by HW scalers > > > > > + * to prepare a frame that's ready for scanout. > > > > > + * @last_frame_ts: "last" reference buffer timestamp. > > > > > + * The timestamp refers to the timestamp field in struct v4l2_buffer. > > > > > + * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64. > > > > > + * @golden_frame_ts: "golden" reference buffer timestamp. > > > > > + * The timestamp refers to the timestamp field in struct v4l2_buffer. > > > > > + * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64. > > > > > + * @alt_frame_ts: "alt" reference buffer timestamp. > > > > > + * The timestamp refers to the timestamp field in struct v4l2_buffer. > > > > > + * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64. > > > > > + * @ref_frame_sign_bias: a bitfield specifying whether the sign bias is set for a given > > > > > + * reference frame. Either of V4L2_VP9_SIGN_BIAS_{}. > > > > > + * @reset_frame_context: specifies whether the frame context should be reset to default values. > > > > > + * Either of V4L2_VP9_RESET_FRAME_CTX_{}. > > > > > + * @frame_context_idx: frame context that should be used/updated. > > > > > + * @profile: VP9 profile. Can be 0, 1, 2 or 3. > > > > > + * @bit_depth: bits per components. Can be 8, 10 or 12. Note that not all profiles support > > > > > + * 10 and/or 12 bits depths. > > > > > + * @interpolation_filter: specifies the filter selection used for performing inter prediction. > > > > > + * Set to one of V4L2_VP9_INTERP_FILTER_{}. > > > > > + * @tile_cols_log2: specifies the base 2 logarithm of the width of each tile (where the width > > > > > + * is measured in units of 8x8 blocks). Shall be less than or equal to 6. > > > > > + * @tile_rows_log2: specifies the base 2 logarithm of the height of each tile (where the height > > > > > + * is measured in units of 8x8 blocks). > > > > > + * @reference_mode: specifies the type of inter prediction to be used. > > > > > + * Set to one of V4L2_VP9_REFERENCE_MODE_{}. > > > > > + * @reserved: padding field. Should be zeroed by applications. > > > > > + */ > > > > > +struct v4l2_ctrl_vp9_frame { > > > > > + struct v4l2_vp9_loop_filter lf; > > > > > + struct v4l2_vp9_quantization quant; > > > > > + struct v4l2_vp9_segmentation seg; > > > > > + __u32 flags; > > > > > + __u16 compressed_header_size; > > > > > + __u16 uncompressed_header_size; > > > > > + __u16 frame_width_minus_1; > > > > > + __u16 frame_height_minus_1; > > > > > + __u16 render_width_minus_1; > > > > > + __u16 render_height_minus_1; > > > > > + __u64 last_frame_ts; > > > > > + __u64 golden_frame_ts; > > > > > + __u64 alt_frame_ts; > > > > > + __u8 ref_frame_sign_bias; > > > > > + __u8 reset_frame_context; > > > > > + __u8 frame_context_idx; > > > > > + __u8 profile; > > > > > + __u8 bit_depth; > > > > > + __u8 interpolation_filter; > > > > > + __u8 tile_cols_log2; > > > > > + __u8 tile_rows_log2; > > > > > + __u8 reference_mode; > > > > > + __u8 reserved[7]; > > > > > +}; > > > > > + > > > > > +#define V4L2_VP9_NUM_FRAME_CTX 4 > > > > > + > > > > > +/** > > > > > + * struct v4l2_vp9_mv_probs - VP9 Motion vector probability updates > > > > > + * @joint: motion vector joint probability updates. > > > > > + * @sign: motion vector sign probability updates. > > > > > + * @classes: motion vector class probability updates. > > > > > + * @class0_bit: motion vector class0 bit probability updates. > > > > > + * @bits: motion vector bits probability updates. > > > > > + * @class0_fr: motion vector class0 fractional bit probability updates. > > > > > + * @fr: motion vector fractional bit probability updates. > > > > > + * @class0_hp: motion vector class0 high precision fractional bit probability updates. > > > > > + * @hp: motion vector high precision fractional bit probability updates. > > > > > + * > > > > > + * This structure contains new values of motion vector probabilities. > > > > > + * A value of zero in an array element means there is no update of the relevant probability. > > > > > + * See `struct v4l2_vp9_prob_updates` for details. > > > > > + */ > > > > > +struct v4l2_vp9_mv_probs { > > > > > + __u8 joint[3]; > > > > > + __u8 sign[2]; > > > > > + __u8 classes[2][10]; > > > > > + __u8 class0_bit[2]; > > > > > + __u8 bits[2][10]; > > > > > + __u8 class0_fr[2][2][3]; > > > > > + __u8 fr[2][3]; > > > > > + __u8 class0_hp[2]; > > > > > + __u8 hp[2]; > > > > > +}; > > > > > + > > > > > +#define V4L2_CID_STATELESS_VP9_COMPRESSED_HDR (V4L2_CID_CODEC_STATELESS_BASE + 301) > > > > > + > > > > > +#define V4L2_VP9_TX_MODE_ONLY_4X4 0 > > > > > +#define V4L2_VP9_TX_MODE_ALLOW_8X8 1 > > > > > +#define V4L2_VP9_TX_MODE_ALLOW_16X16 2 > > > > > +#define V4L2_VP9_TX_MODE_ALLOW_32X32 3 > > > > > +#define V4L2_VP9_TX_MODE_SELECT 4 > > > > > + > > > > > +/** > > > > > + * struct v4l2_ctrl_vp9_compressed_hdr - VP9 probability updates control > > > > > + * @tx_mode: specifies the TX mode. Set to one of V4L2_VP9_TX_MODE_{}. > > > > > + * @tx8: TX 8x8 probability updates. > > > > > + * @tx16: TX 16x16 probability updates. > > > > > + * @tx32: TX 32x32 probability updates. > > > > > + * @coef: coefficient probability updates. > > > > > + * @skip: skip probability updates. > > > > > + * @inter_mode: inter mode probability updates. > > > > > + * @interp_filter: interpolation filter probability updates. > > > > > + * @is_inter: is inter-block probability updates. > > > > > + * @comp_mode: compound prediction mode probability updates. > > > > > + * @single_ref: single ref probability updates. > > > > > + * @comp_ref: compound ref probability updates. > > > > > + * @y_mode: Y prediction mode probability updates. > > > > > + * @uv_mode: UV prediction mode probability updates. > > > > > + * @partition: partition probability updates. > > > > > + * @mv: motion vector probability updates. > > > > > + * > > > > > + * This structure holds the probabilities update as parsed in the compressed > > > > > + * header (Spec 6.3). These values represent the value of probability update after > > > > > + * being translated with inv_map_table[] (see 6.3.5). A value of zero in an array element > > > > > + * means that there is no update of the relevant probability. > > > > > + * > > > > > + * This control is optional and needs to be used when dealing with the hardware which is > > > > > + * not capable of parsing the compressed header itself. Only drivers which need it will > > > > > + * implement it. > > > > > + */ > > > > > +struct v4l2_ctrl_vp9_compressed_hdr { > > > > > + __u8 tx_mode; > > > > > + __u8 tx8[2][1]; > > > > > + __u8 tx16[2][2]; > > > > > + __u8 tx32[2][3]; > > > > > + __u8 coef[4][2][2][6][6][3]; > > > > > + __u8 skip[3]; > > > > > + __u8 inter_mode[7][3]; > > > > > + __u8 interp_filter[4][2]; > > > > > + __u8 is_inter[4]; > > > > > + __u8 comp_mode[5]; > > > > > + __u8 single_ref[5][2]; > > > > > + __u8 comp_ref[5]; > > > > > + __u8 y_mode[4][9]; > > > > > + __u8 uv_mode[10][9]; > > > > > + __u8 partition[16][3]; > > > > > + > > > > > + struct v4l2_vp9_mv_probs mv; > > > > > +}; > > > > > + > > > > > /* MPEG-compression definitions kept for backwards compatibility */ > > > > > #define V4L2_CTRL_CLASS_MPEG V4L2_CTRL_CLASS_CODEC > > > > > #define V4L2_CID_MPEG_CLASS V4L2_CID_CODEC_CLASS > > > > > diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h > > > > > index dcc0b01dfa9a..6e3d58e5a5c4 100644 > > > > > --- a/include/linux/videodev2.h > > > > > +++ b/include/linux/videodev2.h > > > > > @@ -563,6 +563,7 @@ struct v4l2_pix_format { > > > > > /* Grey bit-packed formats */ > > > > > #define V4L2_PIX_FMT_Y10BPACK v4l2_fourcc('Y', '1', '0', 'B') /* 10 Greyscale bit-packed */ > > > > > #define V4L2_PIX_FMT_Y10P v4l2_fourcc('Y', '1', '0', 'P') /* 10 Greyscale, MIPI RAW10 packed */ > > > > > +#define V4L2_PIX_FMT_IPU3_Y10 v4l2_fourcc('i', 'p', '3', 'y') /* IPU3 packed 10-bit greyscale */ > > > > > > > > > > /* Palette formats */ > > > > > #define V4L2_PIX_FMT_PAL8 v4l2_fourcc('P', 'A', 'L', '8') /* 8 8-bit palette */ > > > > > @@ -626,6 +627,8 @@ struct v4l2_pix_format { > > > > > /* Tiled YUV formats, non contiguous planes */ > > > > > #define V4L2_PIX_FMT_NV12MT v4l2_fourcc('T', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 64x32 tiles */ > > > > > #define V4L2_PIX_FMT_NV12MT_16X16 v4l2_fourcc('V', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 16x16 tiles */ > > > > > +#define V4L2_PIX_FMT_NV12M_8L128 v4l2_fourcc('N', 'A', '1', '2') /* Y/CbCr 4:2:0 8x128 tiles */ > > > > > +#define V4L2_PIX_FMT_NV12M_10BE_8L128 v4l2_fourcc_be('N', 'T', '1', '2') /* Y/CbCr 4:2:0 10-bit 8x128 tiles */ > > > > > > > > > > /* Bayer formats - see http://www.siliconimaging.com/RGB%20Bayer.htm */ > > > > > #define V4L2_PIX_FMT_SBGGR8 v4l2_fourcc('B', 'A', '8', '1') /* 8 BGBG.. GRGR.. */ > > > > > @@ -697,6 +700,7 @@ struct v4l2_pix_format { > > > > > #define V4L2_PIX_FMT_VP8 v4l2_fourcc('V', 'P', '8', '0') /* VP8 */ > > > > > #define V4L2_PIX_FMT_VP8_FRAME v4l2_fourcc('V', 'P', '8', 'F') /* VP8 parsed frame */ > > > > > #define V4L2_PIX_FMT_VP9 v4l2_fourcc('V', 'P', '9', '0') /* VP9 */ > > > > > +#define V4L2_PIX_FMT_VP9_FRAME v4l2_fourcc('V', 'P', '9', 'F') /* VP9 parsed frame */ > > > > > #define V4L2_PIX_FMT_HEVC v4l2_fourcc('H', 'E', 'V', 'C') /* HEVC aka H.265 */ > > > > > #define V4L2_PIX_FMT_FWHT v4l2_fourcc('F', 'W', 'H', 'T') /* Fast Walsh Hadamard Transform (vicodec) */ > > > > > #define V4L2_PIX_FMT_FWHT_STATELESS v4l2_fourcc('S', 'F', 'W', 'H') /* Stateless FWHT (vicodec) */ > > > > > @@ -737,8 +741,10 @@ struct v4l2_pix_format { > > > > > #define V4L2_PIX_FMT_INZI v4l2_fourcc('I', 'N', 'Z', 'I') /* Intel Planar Greyscale 10-bit and Depth 16-bit */ > > > > > #define V4L2_PIX_FMT_CNF4 v4l2_fourcc('C', 'N', 'F', '4') /* Intel 4-bit packed depth confidence information */ > > > > > #define V4L2_PIX_FMT_HI240 v4l2_fourcc('H', 'I', '2', '4') /* BTTV 8-bit dithered RGB */ > > > > > +#define V4L2_PIX_FMT_QC08C v4l2_fourcc('Q', '0', '8', 'C') /* Qualcomm 8-bit compressed */ > > > > > +#define V4L2_PIX_FMT_QC10C v4l2_fourcc('Q', '1', '0', 'C') /* Qualcomm 10-bit compressed */ > > > > > > > > > > -/* 10bit raw bayer packed, 32 bytes for every 25 pixels, last LSB 6 bits unused */ > > > > > +/* 10bit raw packed, 32 bytes for every 25 pixels, last LSB 6 bits unused */ > > > > > #define V4L2_PIX_FMT_IPU3_SBGGR10 v4l2_fourcc('i', 'p', '3', 'b') /* IPU3 packed 10-bit BGGR bayer */ > > > > > #define V4L2_PIX_FMT_IPU3_SGBRG10 v4l2_fourcc('i', 'p', '3', 'g') /* IPU3 packed 10-bit GBRG bayer */ > > > > > #define V4L2_PIX_FMT_IPU3_SGRBG10 v4l2_fourcc('i', 'p', '3', 'G') /* IPU3 packed 10-bit GRBG bayer */ > > > > > @@ -1732,6 +1738,8 @@ struct v4l2_ext_control { > > > > > struct v4l2_ctrl_mpeg2_sequence *p_mpeg2_sequence; > > > > > struct v4l2_ctrl_mpeg2_picture *p_mpeg2_picture; > > > > > struct v4l2_ctrl_mpeg2_quantisation *p_mpeg2_quantisation; > > > > > + struct v4l2_ctrl_vp9_compressed_hdr *p_vp9_compressed_hdr_probs; > > > > > + struct v4l2_ctrl_vp9_frame *p_vp9_frame; > > > > > void *ptr; > > > > > }; > > > > > } __attribute__ ((packed)); > > > > > @@ -1792,6 +1800,9 @@ enum v4l2_ctrl_type { > > > > > V4L2_CTRL_TYPE_MPEG2_QUANTISATION = 0x0250, > > > > > V4L2_CTRL_TYPE_MPEG2_SEQUENCE = 0x0251, > > > > > V4L2_CTRL_TYPE_MPEG2_PICTURE = 0x0252, > > > > > + > > > > > + V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR = 0x0260, > > > > > + V4L2_CTRL_TYPE_VP9_FRAME = 0x0261, > > > > > }; > > > > > > > > > > /* Used in the VIDIOC_QUERYCTRL ioctl for querying controls */ > > -- > Regards, > > Laurent Pinchart
Quoting Kieran Bingham (2022-08-02 13:52:43) > Quoting Laurent Pinchart via libcamera-devel (2022-08-02 11:21:23) > > Hi Jacopo, > > > > On Tue, Aug 02, 2022 at 09:52:08AM +0200, Jacopo Mondi wrote: > > > On Mon, Aug 01, 2022 at 10:47:04PM +0300, Laurent Pinchart wrote: > > > > On Mon, Aug 01, 2022 at 05:16:29PM +0200, Jacopo Mondi wrote: > > > > > On Mon, Aug 01, 2022 at 03:05:31AM +0300, Laurent Pinchart via libcamera-devel wrote: > > > > > > Update kernel headers to v5.19 using utils/update-kernel-headers.sh and > > > > > > re-instating libcamera local modifications. > > > > > > > > > > Don't we need something better than this ? > > > > > > > > > > should we regularly rebase the libcamera-changes on top of a new > > > > > header export per each kernel release ? > > > > > > > > > > Otherwise updating headers and re-applying the local modifications in > > > > > one go makes it impossible to actually track what's local and what's > > > > > upstream ? > > > > > > > > This patch was possibly easier to generate than it is to review. The > > > > update-kernel-headers.sh script undoes all the local changes, and I've > > > > then used git add -p to avoid picking up the reverts. This is a manual > > > > process that can lead to errors. > > > > > > The error-proness is what I'm concerned with > > > > > > > On the review side, it's really about making sure that the update > > > > doesn't drop any of the features we depend on. It may seem error-prone > > > > too, but most (not all though) of the local changes we carry will be > > > > detected at compilation time of reverted. > > > > > > True that > > > > > > > The best way to avoid all this is of course to upstream all the changes, > > > > and that's something we keep working on, with various delays depending > > > > on the features. For instance, patches 02/13 and 03/13 in this series > > > > will effectively disappear once we upgrade to the v5.20 kernel headers. > > > > Other changes take longer to upstream. > > > > > > > > I'm open to other ideas to improve the process, but completely > > > > overwriting the headers and then reapplying local changes on top will > > > > break compilation during bisection. > > > > > > I can only suggest to do that on the side and compare the output. > > > But that's a suggestion for review more than for development. > > > > We could indeed post the change as two patches, one that overwrites > > everything, and the second one that reapplies our local changes, and > > squash when pushing. > > I wouldn't even squash. We could simply keep re-cherry-picking the > add-on commits. That would make it clear that the import overwrites the > additions, and then we clearly bring them back in reviewable chunks 'on > top' of the latest kernel headers. Argh, except that would break compilation bisectability ... so yes, we would have to squash them :-(
diff --git a/include/linux/README b/include/linux/README index 4e314b9820ce..9f61517a119a 100644 --- a/include/linux/README +++ b/include/linux/README @@ -1,4 +1,4 @@ # SPDX-License-Identifier: CC0-1.0 -Files in this directory are imported from v5.16-rc7 of the Linux kernel. Do not +Files in this directory are imported from v5.19 of the Linux kernel. Do not modify them manually. diff --git a/include/linux/dma-buf.h b/include/linux/dma-buf.h index 8e4a2ca0bcbf..b1523cb8ab30 100644 --- a/include/linux/dma-buf.h +++ b/include/linux/dma-buf.h @@ -92,7 +92,7 @@ struct dma_buf_sync { * between them in actual uapi, they're just different numbers. */ #define DMA_BUF_SET_NAME _IOW(DMA_BUF_BASE, 1, const char *) -#define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, u32) -#define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, u64) +#define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, __u32) +#define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, __u64) #endif diff --git a/include/linux/drm_fourcc.h b/include/linux/drm_fourcc.h index ea11dcb405e5..cc69eecc606f 100644 --- a/include/linux/drm_fourcc.h +++ b/include/linux/drm_fourcc.h @@ -314,6 +314,13 @@ extern "C" { */ #define DRM_FORMAT_P016 fourcc_code('P', '0', '1', '6') /* 2x2 subsampled Cr:Cb plane 16 bits per channel */ +/* 2 plane YCbCr420. + * 3 10 bit components and 2 padding bits packed into 4 bytes. + * index 0 = Y plane, [31:0] x:Y2:Y1:Y0 2:10:10:10 little endian + * index 1 = Cr:Cb plane, [63:0] x:Cr2:Cb2:Cr1:x:Cb1:Cr0:Cb0 [2:10:10:10:2:10:10:10] little endian + */ +#define DRM_FORMAT_P030 fourcc_code('P', '0', '3', '0') /* 2x2 subsampled Cr:Cb plane 10 bits per channel packed */ + /* 3 plane non-subsampled (444) YCbCr * 16 bits per component, but only 10 bits are used and 6 bits are padded * index 0: Y plane, [15:0] Y:x [10:6] little endian @@ -630,6 +637,53 @@ extern "C" { */ #define I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC fourcc_mod_code(INTEL, 8) +/* + * Intel Tile 4 layout + * + * This is a tiled layout using 4KB tiles in a row-major layout. It has the same + * shape as Tile Y at two granularities: 4KB (128B x 32) and 64B (16B x 4). It + * only differs from Tile Y at the 256B granularity in between. At this + * granularity, Tile Y has a shape of 16B x 32 rows, but this tiling has a shape + * of 64B x 8 rows. + */ +#define I915_FORMAT_MOD_4_TILED fourcc_mod_code(INTEL, 9) + +/* + * Intel color control surfaces (CCS) for DG2 render compression. + * + * The main surface is Tile 4 and at plane index 0. The CCS data is stored + * outside of the GEM object in a reserved memory area dedicated for the + * storage of the CCS data for all RC/RC_CC/MC compressible GEM objects. The + * main surface pitch is required to be a multiple of four Tile 4 widths. + */ +#define I915_FORMAT_MOD_4_TILED_DG2_RC_CCS fourcc_mod_code(INTEL, 10) + +/* + * Intel color control surfaces (CCS) for DG2 media compression. + * + * The main surface is Tile 4 and at plane index 0. For semi-planar formats + * like NV12, the Y and UV planes are Tile 4 and are located at plane indices + * 0 and 1, respectively. The CCS for all planes are stored outside of the + * GEM object in a reserved memory area dedicated for the storage of the + * CCS data for all RC/RC_CC/MC compressible GEM objects. The main surface + * pitch is required to be a multiple of four Tile 4 widths. + */ +#define I915_FORMAT_MOD_4_TILED_DG2_MC_CCS fourcc_mod_code(INTEL, 11) + +/* + * Intel Color Control Surface with Clear Color (CCS) for DG2 render compression. + * + * The main surface is Tile 4 and at plane index 0. The CCS data is stored + * outside of the GEM object in a reserved memory area dedicated for the + * storage of the CCS data for all RC/RC_CC/MC compressible GEM objects. The + * main surface pitch is required to be a multiple of four Tile 4 widths. The + * clear color is stored at plane index 1 and the pitch should be ignored. The + * format of the 256 bits of clear color data matches the one used for the + * I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC modifier, see its description + * for details. + */ +#define I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC fourcc_mod_code(INTEL, 12) + /* * IPU3 Bayer packing layout * @@ -638,7 +692,7 @@ extern "C" { * the 6 most significant bits in the last byte unused. The format is little * endian. */ -#define IPU3_FORMAT_MOD_PACKED fourcc_mod_code(INTEL, 9) +#define IPU3_FORMAT_MOD_PACKED fourcc_mod_code(INTEL, 13) /* * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks @@ -677,6 +731,28 @@ extern "C" { */ #define DRM_FORMAT_MOD_QCOM_COMPRESSED fourcc_mod_code(QCOM, 1) +/* + * Qualcomm Tiled Format + * + * Similar to DRM_FORMAT_MOD_QCOM_COMPRESSED but not compressed. + * Implementation may be platform and base-format specific. + * + * Each macrotile consists of m x n (mostly 4 x 4) tiles. + * Pixel data pitch/stride is aligned with macrotile width. + * Pixel data height is aligned with macrotile height. + * Entire pixel data buffer is aligned with 4k(bytes). + */ +#define DRM_FORMAT_MOD_QCOM_TILED3 fourcc_mod_code(QCOM, 3) + +/* + * Qualcomm Alternate Tiled Format + * + * Alternate tiled format typically only used within GMEM. + * Implementation may be platform and base-format specific. + */ +#define DRM_FORMAT_MOD_QCOM_TILED2 fourcc_mod_code(QCOM, 2) + + /* Vivante framebuffer modifiers */ /* @@ -929,6 +1005,10 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) * and UV. Some SAND-using hardware stores UV in a separate tiled * image from Y to reduce the column height, which is not supported * with these modifiers. + * + * The DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT modifier is also + * supported for DRM_FORMAT_P030 where the columns remain as 128 bytes + * wide, but as this is a 10 bpp format that translates to 96 pixels. */ #define DRM_FORMAT_MOD_BROADCOM_SAND32_COL_HEIGHT(v) \ @@ -1439,11 +1519,11 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) #define AMD_FMT_MOD_PIPE_MASK 0x7 #define AMD_FMT_MOD_SET(field, value) \ - ((uint64_t)(value) << AMD_FMT_MOD_##field##_SHIFT) + ((__u64)(value) << AMD_FMT_MOD_##field##_SHIFT) #define AMD_FMT_MOD_GET(field, value) \ (((value) >> AMD_FMT_MOD_##field##_SHIFT) & AMD_FMT_MOD_##field##_MASK) #define AMD_FMT_MOD_CLEAR(field) \ - (~((uint64_t)AMD_FMT_MOD_##field##_MASK << AMD_FMT_MOD_##field##_SHIFT)) + (~((__u64)AMD_FMT_MOD_##field##_MASK << AMD_FMT_MOD_##field##_SHIFT)) /* Mobile Industry Processor Interface (MIPI) modifiers */ diff --git a/include/linux/intel-ipu3.h b/include/linux/intel-ipu3.h index f30dce43d1d8..5c298ec557fa 100644 --- a/include/linux/intel-ipu3.h +++ b/include/linux/intel-ipu3.h @@ -34,11 +34,17 @@ * struct ipu3_uapi_grid_config - Grid plane config * * @width: Grid horizontal dimensions, in number of grid blocks(cells). + * For AWB, the range is (16, 80). + * For AF/AE, the range is (16, 32). * @height: Grid vertical dimensions, in number of grid cells. + * For AWB, the range is (16, 60). + * For AF/AE, the range is (16, 24). * @block_width_log2: Log2 of the width of each cell in pixels. - * for (2^3, 2^4, 2^5, 2^6, 2^7), values [3, 7]. + * For AWB, the range is [3, 6]. + * For AF/AE, the range is [3, 7]. * @block_height_log2: Log2 of the height of each cell in pixels. - * for (2^3, 2^4, 2^5, 2^6, 2^7), values [3, 7]. + * For AWB, the range is [3, 6]. + * For AF/AE, the range is [3, 7]. * @height_per_slice: The number of blocks in vertical axis per slice. * Default 2. * @x_start: X value of top left corner of Region of Interest(ROI). @@ -68,21 +74,21 @@ struct ipu3_uapi_grid_config { * @R_avg: Red average in the cell. * @B_avg: Blue average in the cell. * @Gb_avg: Green average for blue lines in the cell. - * @sat_ratio: Percentage of pixels over a given threshold set in + * @sat_ratio: Percentage of pixels over the thresholds specified in * ipu3_uapi_awb_config_s, coded from 0 to 255. - * @padding0: Unused byte for padding. - * @padding1: Unused byte for padding. - * @padding2: Unused byte for padding. + * @padding0: Unused byte for padding. + * @padding1: Unused byte for padding. + * @padding2: Unused byte for padding. */ struct ipu3_uapi_awb_set_item { - unsigned char Gr_avg; - unsigned char R_avg; - unsigned char B_avg; - unsigned char Gb_avg; - unsigned char sat_ratio; - unsigned char padding0; - unsigned char padding1; - unsigned char padding2; + __u8 Gr_avg; + __u8 R_avg; + __u8 B_avg; + __u8 Gb_avg; + __u8 sat_ratio; + __u8 padding0; + __u8 padding1; + __u8 padding2; } __attribute__((packed)); /* @@ -98,7 +104,6 @@ struct ipu3_uapi_awb_set_item { (IPU3_UAPI_AWB_MAX_SETS * \ (IPU3_UAPI_AWB_SET_SIZE + IPU3_UAPI_AWB_SPARE_FOR_BUBBLES)) - /** * struct ipu3_uapi_awb_raw_buffer - AWB raw buffer * diff --git a/include/linux/v4l2-controls.h b/include/linux/v4l2-controls.h index a055d2576253..9d2a8237e712 100644 --- a/include/linux/v4l2-controls.h +++ b/include/linux/v4l2-controls.h @@ -128,6 +128,7 @@ enum v4l2_colorfx { V4L2_COLORFX_SOLARIZATION = 13, V4L2_COLORFX_ANTIQUE = 14, V4L2_COLORFX_SET_CBCR = 15, + V4L2_COLORFX_SET_RGB = 16, }; #define V4L2_CID_AUTOBRIGHTNESS (V4L2_CID_BASE+32) #define V4L2_CID_BAND_STOP_FILTER (V4L2_CID_BASE+33) @@ -145,9 +146,10 @@ enum v4l2_colorfx { #define V4L2_CID_ALPHA_COMPONENT (V4L2_CID_BASE+41) #define V4L2_CID_COLORFX_CBCR (V4L2_CID_BASE+42) +#define V4L2_CID_COLORFX_RGB (V4L2_CID_BASE+43) /* last CID + 1 */ -#define V4L2_CID_LASTP1 (V4L2_CID_BASE+43) +#define V4L2_CID_LASTP1 (V4L2_CID_BASE+44) /* USER-class private control IDs */ @@ -221,6 +223,12 @@ enum v4l2_colorfx { */ #define V4L2_CID_USER_ALLEGRO_BASE (V4L2_CID_USER_BASE + 0x1170) +/* + * The base for the isl7998x driver controls. + * We reserve 16 controls for this driver. + */ +#define V4L2_CID_USER_ISL7998X_BASE (V4L2_CID_USER_BASE + 0x1180) + /* MPEG-class control IDs */ /* The MPEG controls are applicable to all codec controls * and the 'MPEG' part of the define is historical */ @@ -443,6 +451,11 @@ enum v4l2_mpeg_video_multi_slice_mode { #define V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES (V4L2_CID_CODEC_BASE+234) #define V4L2_CID_MPEG_VIDEO_DEC_CONCEAL_COLOR (V4L2_CID_CODEC_BASE+235) #define V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD (V4L2_CID_CODEC_BASE+236) +#define V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE (V4L2_CID_CODEC_BASE+237) +enum v4l2_mpeg_video_intra_refresh_period_type { + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM = 0, + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC = 1, +}; /* CIDs for the MPEG-2 Part 2 (H.262) codec */ #define V4L2_CID_MPEG_VIDEO_MPEG2_LEVEL (V4L2_CID_CODEC_BASE+270) @@ -1563,6 +1576,8 @@ struct v4l2_h264_dpb_entry { #define V4L2_H264_DECODE_PARAM_FLAG_IDR_PIC 0x01 #define V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC 0x02 #define V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD 0x04 +#define V4L2_H264_DECODE_PARAM_FLAG_PFRAME 0x08 +#define V4L2_H264_DECODE_PARAM_FLAG_BFRAME 0x10 #define V4L2_CID_STATELESS_H264_DECODE_PARAMS (V4L2_CID_CODEC_STATELESS_BASE + 7) /** @@ -2018,6 +2033,290 @@ struct v4l2_ctrl_hdr10_mastering_display { __u32 min_display_mastering_luminance; }; +/* Stateless VP9 controls */ + +#define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED 0x1 +#define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE 0x2 + +/** + * struct v4l2_vp9_loop_filter - VP9 loop filter parameters + * + * @ref_deltas: contains the adjustment needed for the filter level based on the + * chosen reference frame. If this syntax element is not present in the bitstream, + * users should pass its last value. + * @mode_deltas: contains the adjustment needed for the filter level based on the + * chosen mode. If this syntax element is not present in the bitstream, users should + * pass its last value. + * @level: indicates the loop filter strength. + * @sharpness: indicates the sharpness level. + * @flags: combination of V4L2_VP9_LOOP_FILTER_FLAG_{} flags. + * @reserved: padding field. Should be zeroed by applications. + * + * This structure contains all loop filter related parameters. See sections + * '7.2.8 Loop filter semantics' of the VP9 specification for more details. + */ +struct v4l2_vp9_loop_filter { + __s8 ref_deltas[4]; + __s8 mode_deltas[2]; + __u8 level; + __u8 sharpness; + __u8 flags; + __u8 reserved[7]; +}; + +/** + * struct v4l2_vp9_quantization - VP9 quantization parameters + * + * @base_q_idx: indicates the base frame qindex. + * @delta_q_y_dc: indicates the Y DC quantizer relative to base_q_idx. + * @delta_q_uv_dc: indicates the UV DC quantizer relative to base_q_idx. + * @delta_q_uv_ac: indicates the UV AC quantizer relative to base_q_idx. + * @reserved: padding field. Should be zeroed by applications. + * + * Encodes the quantization parameters. See section '7.2.9 Quantization params + * syntax' of the VP9 specification for more details. + */ +struct v4l2_vp9_quantization { + __u8 base_q_idx; + __s8 delta_q_y_dc; + __s8 delta_q_uv_dc; + __s8 delta_q_uv_ac; + __u8 reserved[4]; +}; + +#define V4L2_VP9_SEGMENTATION_FLAG_ENABLED 0x01 +#define V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP 0x02 +#define V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE 0x04 +#define V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA 0x08 +#define V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE 0x10 + +#define V4L2_VP9_SEG_LVL_ALT_Q 0 +#define V4L2_VP9_SEG_LVL_ALT_L 1 +#define V4L2_VP9_SEG_LVL_REF_FRAME 2 +#define V4L2_VP9_SEG_LVL_SKIP 3 +#define V4L2_VP9_SEG_LVL_MAX 4 + +#define V4L2_VP9_SEGMENT_FEATURE_ENABLED(id) (1 << (id)) +#define V4L2_VP9_SEGMENT_FEATURE_ENABLED_MASK 0xf + +/** + * struct v4l2_vp9_segmentation - VP9 segmentation parameters + * + * @feature_data: data attached to each feature. Data entry is only valid if + * the feature is enabled. The array shall be indexed with segment number as + * the first dimension (0..7) and one of V4L2_VP9_SEG_{} as the second dimension. + * @feature_enabled: bitmask defining which features are enabled in each segment. + * The value for each segment is a combination of V4L2_VP9_SEGMENT_FEATURE_ENABLED(id) + * values where id is one of V4L2_VP9_SEG_LVL_{}. + * @tree_probs: specifies the probability values to be used when decoding a + * Segment-ID. See '5.15. Segmentation map' section of the VP9 specification + * for more details. + * @pred_probs: specifies the probability values to be used when decoding a + * Predicted-Segment-ID. See '6.4.14. Get segment id syntax' section of :ref:`vp9` + * for more details. + * @flags: combination of V4L2_VP9_SEGMENTATION_FLAG_{} flags. + * @reserved: padding field. Should be zeroed by applications. + * + * Encodes the quantization parameters. See section '7.2.10 Segmentation params syntax' of + * the VP9 specification for more details. + */ +struct v4l2_vp9_segmentation { + __s16 feature_data[8][4]; + __u8 feature_enabled[8]; + __u8 tree_probs[7]; + __u8 pred_probs[3]; + __u8 flags; + __u8 reserved[5]; +}; + +#define V4L2_VP9_FRAME_FLAG_KEY_FRAME 0x001 +#define V4L2_VP9_FRAME_FLAG_SHOW_FRAME 0x002 +#define V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT 0x004 +#define V4L2_VP9_FRAME_FLAG_INTRA_ONLY 0x008 +#define V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV 0x010 +#define V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX 0x020 +#define V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE 0x040 +#define V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING 0x080 +#define V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING 0x100 +#define V4L2_VP9_FRAME_FLAG_COLOR_RANGE_FULL_SWING 0x200 + +#define V4L2_VP9_SIGN_BIAS_LAST 0x1 +#define V4L2_VP9_SIGN_BIAS_GOLDEN 0x2 +#define V4L2_VP9_SIGN_BIAS_ALT 0x4 + +#define V4L2_VP9_RESET_FRAME_CTX_NONE 0 +#define V4L2_VP9_RESET_FRAME_CTX_SPEC 1 +#define V4L2_VP9_RESET_FRAME_CTX_ALL 2 + +#define V4L2_VP9_INTERP_FILTER_EIGHTTAP 0 +#define V4L2_VP9_INTERP_FILTER_EIGHTTAP_SMOOTH 1 +#define V4L2_VP9_INTERP_FILTER_EIGHTTAP_SHARP 2 +#define V4L2_VP9_INTERP_FILTER_BILINEAR 3 +#define V4L2_VP9_INTERP_FILTER_SWITCHABLE 4 + +#define V4L2_VP9_REFERENCE_MODE_SINGLE_REFERENCE 0 +#define V4L2_VP9_REFERENCE_MODE_COMPOUND_REFERENCE 1 +#define V4L2_VP9_REFERENCE_MODE_SELECT 2 + +#define V4L2_VP9_PROFILE_MAX 3 + +#define V4L2_CID_STATELESS_VP9_FRAME (V4L2_CID_CODEC_STATELESS_BASE + 300) +/** + * struct v4l2_ctrl_vp9_frame - VP9 frame decoding control + * + * @lf: loop filter parameters. See &v4l2_vp9_loop_filter for more details. + * @quant: quantization parameters. See &v4l2_vp9_quantization for more details. + * @seg: segmentation parameters. See &v4l2_vp9_segmentation for more details. + * @flags: combination of V4L2_VP9_FRAME_FLAG_{} flags. + * @compressed_header_size: compressed header size in bytes. + * @uncompressed_header_size: uncompressed header size in bytes. + * @frame_width_minus_1: add 1 to it and you'll get the frame width expressed in pixels. + * @frame_height_minus_1: add 1 to it and you'll get the frame height expressed in pixels. + * @render_width_minus_1: add 1 to it and you'll get the expected render width expressed in + * pixels. This is not used during the decoding process but might be used by HW scalers + * to prepare a frame that's ready for scanout. + * @render_height_minus_1: add 1 to it and you'll get the expected render height expressed in + * pixels. This is not used during the decoding process but might be used by HW scalers + * to prepare a frame that's ready for scanout. + * @last_frame_ts: "last" reference buffer timestamp. + * The timestamp refers to the timestamp field in struct v4l2_buffer. + * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64. + * @golden_frame_ts: "golden" reference buffer timestamp. + * The timestamp refers to the timestamp field in struct v4l2_buffer. + * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64. + * @alt_frame_ts: "alt" reference buffer timestamp. + * The timestamp refers to the timestamp field in struct v4l2_buffer. + * Use v4l2_timeval_to_ns() to convert the struct timeval to a __u64. + * @ref_frame_sign_bias: a bitfield specifying whether the sign bias is set for a given + * reference frame. Either of V4L2_VP9_SIGN_BIAS_{}. + * @reset_frame_context: specifies whether the frame context should be reset to default values. + * Either of V4L2_VP9_RESET_FRAME_CTX_{}. + * @frame_context_idx: frame context that should be used/updated. + * @profile: VP9 profile. Can be 0, 1, 2 or 3. + * @bit_depth: bits per components. Can be 8, 10 or 12. Note that not all profiles support + * 10 and/or 12 bits depths. + * @interpolation_filter: specifies the filter selection used for performing inter prediction. + * Set to one of V4L2_VP9_INTERP_FILTER_{}. + * @tile_cols_log2: specifies the base 2 logarithm of the width of each tile (where the width + * is measured in units of 8x8 blocks). Shall be less than or equal to 6. + * @tile_rows_log2: specifies the base 2 logarithm of the height of each tile (where the height + * is measured in units of 8x8 blocks). + * @reference_mode: specifies the type of inter prediction to be used. + * Set to one of V4L2_VP9_REFERENCE_MODE_{}. + * @reserved: padding field. Should be zeroed by applications. + */ +struct v4l2_ctrl_vp9_frame { + struct v4l2_vp9_loop_filter lf; + struct v4l2_vp9_quantization quant; + struct v4l2_vp9_segmentation seg; + __u32 flags; + __u16 compressed_header_size; + __u16 uncompressed_header_size; + __u16 frame_width_minus_1; + __u16 frame_height_minus_1; + __u16 render_width_minus_1; + __u16 render_height_minus_1; + __u64 last_frame_ts; + __u64 golden_frame_ts; + __u64 alt_frame_ts; + __u8 ref_frame_sign_bias; + __u8 reset_frame_context; + __u8 frame_context_idx; + __u8 profile; + __u8 bit_depth; + __u8 interpolation_filter; + __u8 tile_cols_log2; + __u8 tile_rows_log2; + __u8 reference_mode; + __u8 reserved[7]; +}; + +#define V4L2_VP9_NUM_FRAME_CTX 4 + +/** + * struct v4l2_vp9_mv_probs - VP9 Motion vector probability updates + * @joint: motion vector joint probability updates. + * @sign: motion vector sign probability updates. + * @classes: motion vector class probability updates. + * @class0_bit: motion vector class0 bit probability updates. + * @bits: motion vector bits probability updates. + * @class0_fr: motion vector class0 fractional bit probability updates. + * @fr: motion vector fractional bit probability updates. + * @class0_hp: motion vector class0 high precision fractional bit probability updates. + * @hp: motion vector high precision fractional bit probability updates. + * + * This structure contains new values of motion vector probabilities. + * A value of zero in an array element means there is no update of the relevant probability. + * See `struct v4l2_vp9_prob_updates` for details. + */ +struct v4l2_vp9_mv_probs { + __u8 joint[3]; + __u8 sign[2]; + __u8 classes[2][10]; + __u8 class0_bit[2]; + __u8 bits[2][10]; + __u8 class0_fr[2][2][3]; + __u8 fr[2][3]; + __u8 class0_hp[2]; + __u8 hp[2]; +}; + +#define V4L2_CID_STATELESS_VP9_COMPRESSED_HDR (V4L2_CID_CODEC_STATELESS_BASE + 301) + +#define V4L2_VP9_TX_MODE_ONLY_4X4 0 +#define V4L2_VP9_TX_MODE_ALLOW_8X8 1 +#define V4L2_VP9_TX_MODE_ALLOW_16X16 2 +#define V4L2_VP9_TX_MODE_ALLOW_32X32 3 +#define V4L2_VP9_TX_MODE_SELECT 4 + +/** + * struct v4l2_ctrl_vp9_compressed_hdr - VP9 probability updates control + * @tx_mode: specifies the TX mode. Set to one of V4L2_VP9_TX_MODE_{}. + * @tx8: TX 8x8 probability updates. + * @tx16: TX 16x16 probability updates. + * @tx32: TX 32x32 probability updates. + * @coef: coefficient probability updates. + * @skip: skip probability updates. + * @inter_mode: inter mode probability updates. + * @interp_filter: interpolation filter probability updates. + * @is_inter: is inter-block probability updates. + * @comp_mode: compound prediction mode probability updates. + * @single_ref: single ref probability updates. + * @comp_ref: compound ref probability updates. + * @y_mode: Y prediction mode probability updates. + * @uv_mode: UV prediction mode probability updates. + * @partition: partition probability updates. + * @mv: motion vector probability updates. + * + * This structure holds the probabilities update as parsed in the compressed + * header (Spec 6.3). These values represent the value of probability update after + * being translated with inv_map_table[] (see 6.3.5). A value of zero in an array element + * means that there is no update of the relevant probability. + * + * This control is optional and needs to be used when dealing with the hardware which is + * not capable of parsing the compressed header itself. Only drivers which need it will + * implement it. + */ +struct v4l2_ctrl_vp9_compressed_hdr { + __u8 tx_mode; + __u8 tx8[2][1]; + __u8 tx16[2][2]; + __u8 tx32[2][3]; + __u8 coef[4][2][2][6][6][3]; + __u8 skip[3]; + __u8 inter_mode[7][3]; + __u8 interp_filter[4][2]; + __u8 is_inter[4]; + __u8 comp_mode[5]; + __u8 single_ref[5][2]; + __u8 comp_ref[5]; + __u8 y_mode[4][9]; + __u8 uv_mode[10][9]; + __u8 partition[16][3]; + + struct v4l2_vp9_mv_probs mv; +}; + /* MPEG-compression definitions kept for backwards compatibility */ #define V4L2_CTRL_CLASS_MPEG V4L2_CTRL_CLASS_CODEC #define V4L2_CID_MPEG_CLASS V4L2_CID_CODEC_CLASS diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h index dcc0b01dfa9a..6e3d58e5a5c4 100644 --- a/include/linux/videodev2.h +++ b/include/linux/videodev2.h @@ -563,6 +563,7 @@ struct v4l2_pix_format { /* Grey bit-packed formats */ #define V4L2_PIX_FMT_Y10BPACK v4l2_fourcc('Y', '1', '0', 'B') /* 10 Greyscale bit-packed */ #define V4L2_PIX_FMT_Y10P v4l2_fourcc('Y', '1', '0', 'P') /* 10 Greyscale, MIPI RAW10 packed */ +#define V4L2_PIX_FMT_IPU3_Y10 v4l2_fourcc('i', 'p', '3', 'y') /* IPU3 packed 10-bit greyscale */ /* Palette formats */ #define V4L2_PIX_FMT_PAL8 v4l2_fourcc('P', 'A', 'L', '8') /* 8 8-bit palette */ @@ -626,6 +627,8 @@ struct v4l2_pix_format { /* Tiled YUV formats, non contiguous planes */ #define V4L2_PIX_FMT_NV12MT v4l2_fourcc('T', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 64x32 tiles */ #define V4L2_PIX_FMT_NV12MT_16X16 v4l2_fourcc('V', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 16x16 tiles */ +#define V4L2_PIX_FMT_NV12M_8L128 v4l2_fourcc('N', 'A', '1', '2') /* Y/CbCr 4:2:0 8x128 tiles */ +#define V4L2_PIX_FMT_NV12M_10BE_8L128 v4l2_fourcc_be('N', 'T', '1', '2') /* Y/CbCr 4:2:0 10-bit 8x128 tiles */ /* Bayer formats - see http://www.siliconimaging.com/RGB%20Bayer.htm */ #define V4L2_PIX_FMT_SBGGR8 v4l2_fourcc('B', 'A', '8', '1') /* 8 BGBG.. GRGR.. */ @@ -697,6 +700,7 @@ struct v4l2_pix_format { #define V4L2_PIX_FMT_VP8 v4l2_fourcc('V', 'P', '8', '0') /* VP8 */ #define V4L2_PIX_FMT_VP8_FRAME v4l2_fourcc('V', 'P', '8', 'F') /* VP8 parsed frame */ #define V4L2_PIX_FMT_VP9 v4l2_fourcc('V', 'P', '9', '0') /* VP9 */ +#define V4L2_PIX_FMT_VP9_FRAME v4l2_fourcc('V', 'P', '9', 'F') /* VP9 parsed frame */ #define V4L2_PIX_FMT_HEVC v4l2_fourcc('H', 'E', 'V', 'C') /* HEVC aka H.265 */ #define V4L2_PIX_FMT_FWHT v4l2_fourcc('F', 'W', 'H', 'T') /* Fast Walsh Hadamard Transform (vicodec) */ #define V4L2_PIX_FMT_FWHT_STATELESS v4l2_fourcc('S', 'F', 'W', 'H') /* Stateless FWHT (vicodec) */ @@ -737,8 +741,10 @@ struct v4l2_pix_format { #define V4L2_PIX_FMT_INZI v4l2_fourcc('I', 'N', 'Z', 'I') /* Intel Planar Greyscale 10-bit and Depth 16-bit */ #define V4L2_PIX_FMT_CNF4 v4l2_fourcc('C', 'N', 'F', '4') /* Intel 4-bit packed depth confidence information */ #define V4L2_PIX_FMT_HI240 v4l2_fourcc('H', 'I', '2', '4') /* BTTV 8-bit dithered RGB */ +#define V4L2_PIX_FMT_QC08C v4l2_fourcc('Q', '0', '8', 'C') /* Qualcomm 8-bit compressed */ +#define V4L2_PIX_FMT_QC10C v4l2_fourcc('Q', '1', '0', 'C') /* Qualcomm 10-bit compressed */ -/* 10bit raw bayer packed, 32 bytes for every 25 pixels, last LSB 6 bits unused */ +/* 10bit raw packed, 32 bytes for every 25 pixels, last LSB 6 bits unused */ #define V4L2_PIX_FMT_IPU3_SBGGR10 v4l2_fourcc('i', 'p', '3', 'b') /* IPU3 packed 10-bit BGGR bayer */ #define V4L2_PIX_FMT_IPU3_SGBRG10 v4l2_fourcc('i', 'p', '3', 'g') /* IPU3 packed 10-bit GBRG bayer */ #define V4L2_PIX_FMT_IPU3_SGRBG10 v4l2_fourcc('i', 'p', '3', 'G') /* IPU3 packed 10-bit GRBG bayer */ @@ -1732,6 +1738,8 @@ struct v4l2_ext_control { struct v4l2_ctrl_mpeg2_sequence *p_mpeg2_sequence; struct v4l2_ctrl_mpeg2_picture *p_mpeg2_picture; struct v4l2_ctrl_mpeg2_quantisation *p_mpeg2_quantisation; + struct v4l2_ctrl_vp9_compressed_hdr *p_vp9_compressed_hdr_probs; + struct v4l2_ctrl_vp9_frame *p_vp9_frame; void *ptr; }; } __attribute__ ((packed)); @@ -1792,6 +1800,9 @@ enum v4l2_ctrl_type { V4L2_CTRL_TYPE_MPEG2_QUANTISATION = 0x0250, V4L2_CTRL_TYPE_MPEG2_SEQUENCE = 0x0251, V4L2_CTRL_TYPE_MPEG2_PICTURE = 0x0252, + + V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR = 0x0260, + V4L2_CTRL_TYPE_VP9_FRAME = 0x0261, }; /* Used in the VIDIOC_QUERYCTRL ioctl for querying controls */
Update kernel headers to v5.19 using utils/update-kernel-headers.sh and re-instating libcamera local modifications. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> --- include/linux/README | 2 +- include/linux/dma-buf.h | 4 +- include/linux/drm_fourcc.h | 86 +++++++++- include/linux/intel-ipu3.h | 35 ++-- include/linux/v4l2-controls.h | 301 +++++++++++++++++++++++++++++++++- include/linux/videodev2.h | 13 +- 6 files changed, 418 insertions(+), 23 deletions(-)