[v2] media: rkisp1: Fix filter mode register configuration
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Message ID 20251129220100.2685228-1-rui.wang@ideasonboard.com
State Superseded
Headers show
Series
  • [v2] media: rkisp1: Fix filter mode register configuration
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Commit Message

Rui Wang Nov. 29, 2025, 10:01 p.m. UTC
The current implementation in rkisp1_flt_config() treats the
arg->mode field as a boolean for enabling DNR mode, which doesn't
properly separate the filter enable bit from the DNR mode bit in
the RKISP1_CIF_ISP_FILT_MODE register.

- Bit 0 of arg->mode controls the filter enable
  (RKISP1_CIF_ISP_FLT_ENA)
- Bit 1 of arg->mode controls the DNR mode
  (RKISP1_CIF_ISP_FLT_MODE_DNR)

This ensures that the filter enable and DNR mode can be configured
independently through the mode field.

Signed-off-by: Rui Wang <rui.wang@ideasonboard.com>
---
 drivers/media/platform/rockchip/rkisp1/rkisp1-params.c | 1 +
 1 file changed, 1 insertion(+)

Patch
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diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
index c9f88635224c..979a22a5d04d 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
@@ -412,6 +412,7 @@  static void rkisp1_flt_config(struct rkisp1_params *params,
 		     arg->lum_weight);
 
 	rkisp1_write(params->rkisp1, RKISP1_CIF_ISP_FILT_MODE,
+		     (arg->mode & RKISP1_CIF_ISP_FLT_ENA) |
 		     (arg->mode ? RKISP1_CIF_ISP_FLT_MODE_DNR : 0) |
 		     RKISP1_CIF_ISP_FLT_CHROMA_V_MODE(arg->chr_v_mode) |
 		     RKISP1_CIF_ISP_FLT_CHROMA_H_MODE(arg->chr_h_mode) |