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{ "id": 4014, "url": "https://patchwork.libcamera.org/api/1.1/patches/4014/?format=api", "web_url": "https://patchwork.libcamera.org/patch/4014/", "project": { "id": 1, "url": "https://patchwork.libcamera.org/api/1.1/projects/1/?format=api", "name": "libcamera", "link_name": "libcamera", "list_id": "libcamera_core", "list_email": "libcamera-devel@lists.libcamera.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20200610130425.23065-1-laurent.pinchart@ideasonboard.com>", "date": "2020-06-10T13:04:25", "name": "[libcamera-devel,v2,8/7] include: linux: Remove drm.h and drm_mode.h", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "923c36a30330a7131993b19f2e098e85bc1b38c8", "submitter": { "id": 2, "url": "https://patchwork.libcamera.org/api/1.1/people/2/?format=api", "name": "Laurent Pinchart", "email": "laurent.pinchart@ideasonboard.com" }, "delegate": null, "mbox": "https://patchwork.libcamera.org/patch/4014/mbox/", "series": [ { "id": 982, "url": "https://patchwork.libcamera.org/api/1.1/series/982/?format=api", "web_url": "https://patchwork.libcamera.org/project/libcamera/list/?series=982", "date": "2020-06-09T23:23:16", "name": "Introduce formats:: namespace for libcamera pixel formats", "version": 2, "mbox": "https://patchwork.libcamera.org/series/982/mbox/" } ], "comments": "https://patchwork.libcamera.org/api/patches/4014/comments/", "check": "pending", "checks": "https://patchwork.libcamera.org/api/patches/4014/checks/", "tags": {}, "headers": { "Return-Path": "<laurent.pinchart@ideasonboard.com>", "Received": [ "from perceval.ideasonboard.com (perceval.ideasonboard.com\n\t[213.167.242.64])\n\tby lancelot.ideasonboard.com (Postfix) with ESMTPS id 6CA32600F6\n\tfor <libcamera-devel@lists.libcamera.org>;\n\tWed, 10 Jun 2020 15:04:49 +0200 (CEST)", "from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi\n\t[81.175.216.236])\n\tby perceval.ideasonboard.com (Postfix) with ESMTPSA id D4D9029E\n\tfor <libcamera-devel@lists.libcamera.org>;\n\tWed, 10 Jun 2020 15:04:48 +0200 (CEST)" ], "Authentication-Results": "lancelot.ideasonboard.com; dkim=pass (1024-bit key; \n\tunprotected) header.d=ideasonboard.com\n\theader.i=@ideasonboard.com\n\theader.b=\"oQMzM/1P\"; dkim-atps=neutral", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com;\n\ts=mail; t=1591794289;\n\tbh=6+Qb24+bAcgLAhZQaOdrnqZH9s9S8qg2hQ+rU9DtB6s=;\n\th=From:To:Subject:Date:In-Reply-To:References:From;\n\tb=oQMzM/1P8Tb4jW0HJOnxlRsNWZ+F1wzXSfqUm+faXD1P8lvIDgC+6NF3/QLpwCc3P\n\twIf5QpCkDxz9KTbYCYazyQaqUjrZRxx1O00WnhLoVo84sFuBAHOn/9MsgIHThyGE3Q\n\tEZgUrYr6CWXd1oJ8XwCNgOrpG+Vq39vhm6d/t4AQ=", "From": "Laurent Pinchart <laurent.pinchart@ideasonboard.com>", "To": "libcamera-devel@lists.libcamera.org", "Date": "Wed, 10 Jun 2020 16:04:25 +0300", "Message-Id": "<20200610130425.23065-1-laurent.pinchart@ideasonboard.com>", "X-Mailer": "git-send-email 2.27.0", "In-Reply-To": "<20200609232323.29628-1-laurent.pinchart@ideasonboard.com>", "References": "<20200609232323.29628-1-laurent.pinchart@ideasonboard.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[libcamera-devel] [PATCH v2 8/7] include: linux: Remove drm.h and\n\tdrm_mode.h", "X-BeenThere": "libcamera-devel@lists.libcamera.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "<libcamera-devel.lists.libcamera.org>", "List-Unsubscribe": "<https://lists.libcamera.org/options/libcamera-devel>,\n\t<mailto:libcamera-devel-request@lists.libcamera.org?subject=unsubscribe>", "List-Archive": "<https://lists.libcamera.org/pipermail/libcamera-devel/>", "List-Post": "<mailto:libcamera-devel@lists.libcamera.org>", "List-Help": "<mailto:libcamera-devel-request@lists.libcamera.org?subject=help>", "List-Subscribe": "<https://lists.libcamera.org/listinfo/libcamera-devel>,\n\t<mailto:libcamera-devel-request@lists.libcamera.org?subject=subscribe>", "X-List-Received-Date": "Wed, 10 Jun 2020 13:04:49 -0000" }, "content": "The drm.h and drm_mode.h headers are not used anymore, as drm_fourcc.h\nisn't included but only parsed by gen-formats.py. Remove them.\n\nSigned-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>\n---\n include/linux/drm.h | 1042 --------------------------------------\n include/linux/drm_mode.h | 1032 -------------------------------------\n 2 files changed, 2074 deletions(-)\n delete mode 100644 include/linux/drm.h\n delete mode 100644 include/linux/drm_mode.h", "diff": "diff --git a/include/linux/drm.h b/include/linux/drm.h\ndeleted file mode 100644\nindex 438abde3621d..000000000000\n--- a/include/linux/drm.h\n+++ /dev/null\n@@ -1,1042 +0,0 @@\n-/**\n- * \\file drm.h\n- * Header for the Direct Rendering Manager\n- *\n- * \\author Rickard E. (Rik) Faith <faith@valinux.com>\n- *\n- * \\par Acknowledgments:\n- * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic \\c cmpxchg.\n- */\n-\n-/*\n- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.\n- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.\n- * All rights reserved.\n- *\n- * Permission is hereby granted, free of charge, to any person obtaining a\n- * copy of this software and associated documentation files (the \"Software\"),\n- * to deal in the Software without restriction, including without limitation\n- * the rights to use, copy, modify, merge, publish, distribute, sublicense,\n- * and/or sell copies of the Software, and to permit persons to whom the\n- * Software is furnished to do so, subject to the following conditions:\n- *\n- * The above copyright notice and this permission notice (including the next\n- * paragraph) shall be included in all copies or substantial portions of the\n- * Software.\n- *\n- * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\n- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,\n- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL\n- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR\n- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,\n- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR\n- * OTHER DEALINGS IN THE SOFTWARE.\n- */\n-\n-#ifndef _DRM_H_\n-#define _DRM_H_\n-\n-#if defined(__linux__)\n-\n-#include <linux/types.h>\n-#include <asm/ioctl.h>\n-typedef unsigned int drm_handle_t;\n-\n-#else /* One of the BSDs */\n-\n-#include <stdint.h>\n-#include <sys/ioccom.h>\n-#include <sys/types.h>\n-typedef int8_t __s8;\n-typedef uint8_t __u8;\n-typedef int16_t __s16;\n-typedef uint16_t __u16;\n-typedef int32_t __s32;\n-typedef uint32_t __u32;\n-typedef int64_t __s64;\n-typedef uint64_t __u64;\n-typedef size_t __kernel_size_t;\n-typedef unsigned long drm_handle_t;\n-\n-#endif\n-\n-#if defined(__cplusplus)\n-extern \"C\" {\n-#endif\n-\n-#define DRM_NAME\t\"drm\"\t /**< Name in kernel, /dev, and /proc */\n-#define DRM_MIN_ORDER\t5\t /**< At least 2^5 bytes = 32 bytes */\n-#define DRM_MAX_ORDER\t22\t /**< Up to 2^22 bytes = 4MB */\n-#define DRM_RAM_PERCENT 10\t /**< How much system ram can we lock? */\n-\n-#define _DRM_LOCK_HELD\t0x80000000U /**< Hardware lock is held */\n-#define _DRM_LOCK_CONT\t0x40000000U /**< Hardware lock is contended */\n-#define _DRM_LOCK_IS_HELD(lock)\t ((lock) & _DRM_LOCK_HELD)\n-#define _DRM_LOCK_IS_CONT(lock)\t ((lock) & _DRM_LOCK_CONT)\n-#define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT))\n-\n-typedef unsigned int drm_context_t;\n-typedef unsigned int drm_drawable_t;\n-typedef unsigned int drm_magic_t;\n-\n-/**\n- * Cliprect.\n- *\n- * \\warning: If you change this structure, make sure you change\n- * XF86DRIClipRectRec in the server as well\n- *\n- * \\note KW: Actually it's illegal to change either for\n- * backwards-compatibility reasons.\n- */\n-struct drm_clip_rect {\n-\tunsigned short x1;\n-\tunsigned short y1;\n-\tunsigned short x2;\n-\tunsigned short y2;\n-};\n-\n-/**\n- * Drawable information.\n- */\n-struct drm_drawable_info {\n-\tunsigned int num_rects;\n-\tstruct drm_clip_rect *rects;\n-};\n-\n-/**\n- * Texture region,\n- */\n-struct drm_tex_region {\n-\tunsigned char next;\n-\tunsigned char prev;\n-\tunsigned char in_use;\n-\tunsigned char padding;\n-\tunsigned int age;\n-};\n-\n-/**\n- * Hardware lock.\n- *\n- * The lock structure is a simple cache-line aligned integer. To avoid\n- * processor bus contention on a multiprocessor system, there should not be any\n- * other data stored in the same cache line.\n- */\n-struct drm_hw_lock {\n-\t__volatile__ unsigned int lock;\t\t/**< lock variable */\n-\tchar padding[60];\t\t\t/**< Pad to cache line */\n-};\n-\n-/**\n- * DRM_IOCTL_VERSION ioctl argument type.\n- *\n- * \\sa drmGetVersion().\n- */\n-struct drm_version {\n-\tint version_major;\t /**< Major version */\n-\tint version_minor;\t /**< Minor version */\n-\tint version_patchlevel;\t /**< Patch level */\n-\t__kernel_size_t name_len;\t /**< Length of name buffer */\n-\tchar *name;\t /**< Name of driver */\n-\t__kernel_size_t date_len;\t /**< Length of date buffer */\n-\tchar *date;\t /**< User-space buffer to hold date */\n-\t__kernel_size_t desc_len;\t /**< Length of desc buffer */\n-\tchar *desc;\t /**< User-space buffer to hold desc */\n-};\n-\n-/**\n- * DRM_IOCTL_GET_UNIQUE ioctl argument type.\n- *\n- * \\sa drmGetBusid() and drmSetBusId().\n- */\n-struct drm_unique {\n-\t__kernel_size_t unique_len;\t /**< Length of unique */\n-\tchar *unique;\t /**< Unique name for driver instantiation */\n-};\n-\n-struct drm_list {\n-\tint count;\t\t /**< Length of user-space structures */\n-\tstruct drm_version *version;\n-};\n-\n-struct drm_block {\n-\tint unused;\n-};\n-\n-/**\n- * DRM_IOCTL_CONTROL ioctl argument type.\n- *\n- * \\sa drmCtlInstHandler() and drmCtlUninstHandler().\n- */\n-struct drm_control {\n-\tenum {\n-\t\tDRM_ADD_COMMAND,\n-\t\tDRM_RM_COMMAND,\n-\t\tDRM_INST_HANDLER,\n-\t\tDRM_UNINST_HANDLER\n-\t} func;\n-\tint irq;\n-};\n-\n-/**\n- * Type of memory to map.\n- */\n-enum drm_map_type {\n-\t_DRM_FRAME_BUFFER = 0,\t /**< WC (no caching), no core dump */\n-\t_DRM_REGISTERS = 1,\t /**< no caching, no core dump */\n-\t_DRM_SHM = 2,\t\t /**< shared, cached */\n-\t_DRM_AGP = 3,\t\t /**< AGP/GART */\n-\t_DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */\n-\t_DRM_CONSISTENT = 5\t /**< Consistent memory for PCI DMA */\n-};\n-\n-/**\n- * Memory mapping flags.\n- */\n-enum drm_map_flags {\n-\t_DRM_RESTRICTED = 0x01,\t /**< Cannot be mapped to user-virtual */\n-\t_DRM_READ_ONLY = 0x02,\n-\t_DRM_LOCKED = 0x04,\t /**< shared, cached, locked */\n-\t_DRM_KERNEL = 0x08,\t /**< kernel requires access */\n-\t_DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */\n-\t_DRM_CONTAINS_LOCK = 0x20, /**< SHM page that contains lock */\n-\t_DRM_REMOVABLE = 0x40,\t /**< Removable mapping */\n-\t_DRM_DRIVER = 0x80\t /**< Managed by driver */\n-};\n-\n-struct drm_ctx_priv_map {\n-\tunsigned int ctx_id;\t /**< Context requesting private mapping */\n-\tvoid *handle;\t\t /**< Handle of map */\n-};\n-\n-/**\n- * DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls\n- * argument type.\n- *\n- * \\sa drmAddMap().\n- */\n-struct drm_map {\n-\tunsigned long offset;\t /**< Requested physical address (0 for SAREA)*/\n-\tunsigned long size;\t /**< Requested physical size (bytes) */\n-\tenum drm_map_type type;\t /**< Type of memory to map */\n-\tenum drm_map_flags flags;\t /**< Flags */\n-\tvoid *handle;\t\t /**< User-space: \"Handle\" to pass to mmap() */\n-\t\t\t\t /**< Kernel-space: kernel-virtual address */\n-\tint mtrr;\t\t /**< MTRR slot used */\n-\t/* Private data */\n-};\n-\n-/**\n- * DRM_IOCTL_GET_CLIENT ioctl argument type.\n- */\n-struct drm_client {\n-\tint idx;\t\t/**< Which client desired? */\n-\tint auth;\t\t/**< Is client authenticated? */\n-\tunsigned long pid;\t/**< Process ID */\n-\tunsigned long uid;\t/**< User ID */\n-\tunsigned long magic;\t/**< Magic */\n-\tunsigned long iocs;\t/**< Ioctl count */\n-};\n-\n-enum drm_stat_type {\n-\t_DRM_STAT_LOCK,\n-\t_DRM_STAT_OPENS,\n-\t_DRM_STAT_CLOSES,\n-\t_DRM_STAT_IOCTLS,\n-\t_DRM_STAT_LOCKS,\n-\t_DRM_STAT_UNLOCKS,\n-\t_DRM_STAT_VALUE,\t/**< Generic value */\n-\t_DRM_STAT_BYTE,\t\t/**< Generic byte counter (1024bytes/K) */\n-\t_DRM_STAT_COUNT,\t/**< Generic non-byte counter (1000/k) */\n-\n-\t_DRM_STAT_IRQ,\t\t/**< IRQ */\n-\t_DRM_STAT_PRIMARY,\t/**< Primary DMA bytes */\n-\t_DRM_STAT_SECONDARY,\t/**< Secondary DMA bytes */\n-\t_DRM_STAT_DMA,\t\t/**< DMA */\n-\t_DRM_STAT_SPECIAL,\t/**< Special DMA (e.g., priority or polled) */\n-\t_DRM_STAT_MISSED\t/**< Missed DMA opportunity */\n-\t /* Add to the *END* of the list */\n-};\n-\n-/**\n- * DRM_IOCTL_GET_STATS ioctl argument type.\n- */\n-struct drm_stats {\n-\tunsigned long count;\n-\tstruct {\n-\t\tunsigned long value;\n-\t\tenum drm_stat_type type;\n-\t} data[15];\n-};\n-\n-/**\n- * Hardware locking flags.\n- */\n-enum drm_lock_flags {\n-\t_DRM_LOCK_READY = 0x01,\t /**< Wait until hardware is ready for DMA */\n-\t_DRM_LOCK_QUIESCENT = 0x02, /**< Wait until hardware quiescent */\n-\t_DRM_LOCK_FLUSH = 0x04,\t /**< Flush this context's DMA queue first */\n-\t_DRM_LOCK_FLUSH_ALL = 0x08, /**< Flush all DMA queues first */\n-\t/* These *HALT* flags aren't supported yet\n-\t -- they will be used to support the\n-\t full-screen DGA-like mode. */\n-\t_DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */\n-\t_DRM_HALT_CUR_QUEUES = 0x20 /**< Halt all current queues */\n-};\n-\n-/**\n- * DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type.\n- *\n- * \\sa drmGetLock() and drmUnlock().\n- */\n-struct drm_lock {\n-\tint context;\n-\tenum drm_lock_flags flags;\n-};\n-\n-/**\n- * DMA flags\n- *\n- * \\warning\n- * These values \\e must match xf86drm.h.\n- *\n- * \\sa drm_dma.\n- */\n-enum drm_dma_flags {\n-\t/* Flags for DMA buffer dispatch */\n-\t_DRM_DMA_BLOCK = 0x01,\t /**<\n-\t\t\t\t * Block until buffer dispatched.\n-\t\t\t\t *\n-\t\t\t\t * \\note The buffer may not yet have\n-\t\t\t\t * been processed by the hardware --\n-\t\t\t\t * getting a hardware lock with the\n-\t\t\t\t * hardware quiescent will ensure\n-\t\t\t\t * that the buffer has been\n-\t\t\t\t * processed.\n-\t\t\t\t */\n-\t_DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */\n-\t_DRM_DMA_PRIORITY = 0x04, /**< High priority dispatch */\n-\n-\t/* Flags for DMA buffer request */\n-\t_DRM_DMA_WAIT = 0x10,\t /**< Wait for free buffers */\n-\t_DRM_DMA_SMALLER_OK = 0x20, /**< Smaller-than-requested buffers OK */\n-\t_DRM_DMA_LARGER_OK = 0x40 /**< Larger-than-requested buffers OK */\n-};\n-\n-/**\n- * DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type.\n- *\n- * \\sa drmAddBufs().\n- */\n-struct drm_buf_desc {\n-\tint count;\t\t /**< Number of buffers of this size */\n-\tint size;\t\t /**< Size in bytes */\n-\tint low_mark;\t\t /**< Low water mark */\n-\tint high_mark;\t\t /**< High water mark */\n-\tenum {\n-\t\t_DRM_PAGE_ALIGN = 0x01,\t/**< Align on page boundaries for DMA */\n-\t\t_DRM_AGP_BUFFER = 0x02,\t/**< Buffer is in AGP space */\n-\t\t_DRM_SG_BUFFER = 0x04,\t/**< Scatter/gather memory buffer */\n-\t\t_DRM_FB_BUFFER = 0x08,\t/**< Buffer is in frame buffer */\n-\t\t_DRM_PCI_BUFFER_RO = 0x10 /**< Map PCI DMA buffer read-only */\n-\t} flags;\n-\tunsigned long agp_start; /**<\n-\t\t\t\t * Start address of where the AGP buffers are\n-\t\t\t\t * in the AGP aperture\n-\t\t\t\t */\n-};\n-\n-/**\n- * DRM_IOCTL_INFO_BUFS ioctl argument type.\n- */\n-struct drm_buf_info {\n-\tint count;\t\t/**< Entries in list */\n-\tstruct drm_buf_desc *list;\n-};\n-\n-/**\n- * DRM_IOCTL_FREE_BUFS ioctl argument type.\n- */\n-struct drm_buf_free {\n-\tint count;\n-\tint *list;\n-};\n-\n-/**\n- * Buffer information\n- *\n- * \\sa drm_buf_map.\n- */\n-struct drm_buf_pub {\n-\tint idx;\t\t /**< Index into the master buffer list */\n-\tint total;\t\t /**< Buffer size */\n-\tint used;\t\t /**< Amount of buffer in use (for DMA) */\n-\tvoid *address;\t /**< Address of buffer */\n-};\n-\n-/**\n- * DRM_IOCTL_MAP_BUFS ioctl argument type.\n- */\n-struct drm_buf_map {\n-\tint count;\t\t/**< Length of the buffer list */\n-#ifdef __cplusplus\n-\tvoid *virt;\n-#else\n-\tvoid *virtual;\t\t/**< Mmap'd area in user-virtual */\n-#endif\n-\tstruct drm_buf_pub *list;\t/**< Buffer information */\n-};\n-\n-/**\n- * DRM_IOCTL_DMA ioctl argument type.\n- *\n- * Indices here refer to the offset into the buffer list in drm_buf_get.\n- *\n- * \\sa drmDMA().\n- */\n-struct drm_dma {\n-\tint context;\t\t\t /**< Context handle */\n-\tint send_count;\t\t\t /**< Number of buffers to send */\n-\tint *send_indices;\t /**< List of handles to buffers */\n-\tint *send_sizes;\t\t /**< Lengths of data to send */\n-\tenum drm_dma_flags flags;\t /**< Flags */\n-\tint request_count;\t\t /**< Number of buffers requested */\n-\tint request_size;\t\t /**< Desired size for buffers */\n-\tint *request_indices;\t /**< Buffer information */\n-\tint *request_sizes;\n-\tint granted_count;\t\t /**< Number of buffers granted */\n-};\n-\n-enum drm_ctx_flags {\n-\t_DRM_CONTEXT_PRESERVED = 0x01,\n-\t_DRM_CONTEXT_2DONLY = 0x02\n-};\n-\n-/**\n- * DRM_IOCTL_ADD_CTX ioctl argument type.\n- *\n- * \\sa drmCreateContext() and drmDestroyContext().\n- */\n-struct drm_ctx {\n-\tdrm_context_t handle;\n-\tenum drm_ctx_flags flags;\n-};\n-\n-/**\n- * DRM_IOCTL_RES_CTX ioctl argument type.\n- */\n-struct drm_ctx_res {\n-\tint count;\n-\tstruct drm_ctx *contexts;\n-};\n-\n-/**\n- * DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type.\n- */\n-struct drm_draw {\n-\tdrm_drawable_t handle;\n-};\n-\n-/**\n- * DRM_IOCTL_UPDATE_DRAW ioctl argument type.\n- */\n-typedef enum {\n-\tDRM_DRAWABLE_CLIPRECTS\n-} drm_drawable_info_type_t;\n-\n-struct drm_update_draw {\n-\tdrm_drawable_t handle;\n-\tunsigned int type;\n-\tunsigned int num;\n-\tunsigned long long data;\n-};\n-\n-/**\n- * DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type.\n- */\n-struct drm_auth {\n-\tdrm_magic_t magic;\n-};\n-\n-/**\n- * DRM_IOCTL_IRQ_BUSID ioctl argument type.\n- *\n- * \\sa drmGetInterruptFromBusID().\n- */\n-struct drm_irq_busid {\n-\tint irq;\t/**< IRQ number */\n-\tint busnum;\t/**< bus number */\n-\tint devnum;\t/**< device number */\n-\tint funcnum;\t/**< function number */\n-};\n-\n-enum drm_vblank_seq_type {\n-\t_DRM_VBLANK_ABSOLUTE = 0x0,\t/**< Wait for specific vblank sequence number */\n-\t_DRM_VBLANK_RELATIVE = 0x1,\t/**< Wait for given number of vblanks */\n-\t/* bits 1-6 are reserved for high crtcs */\n-\t_DRM_VBLANK_HIGH_CRTC_MASK = 0x0000003e,\n-\t_DRM_VBLANK_EVENT = 0x4000000, /**< Send event instead of blocking */\n-\t_DRM_VBLANK_FLIP = 0x8000000, /**< Scheduled buffer swap should flip */\n-\t_DRM_VBLANK_NEXTONMISS = 0x10000000,\t/**< If missed, wait for next vblank */\n-\t_DRM_VBLANK_SECONDARY = 0x20000000,\t/**< Secondary display controller */\n-\t_DRM_VBLANK_SIGNAL = 0x40000000\t/**< Send signal instead of blocking, unsupported */\n-};\n-#define _DRM_VBLANK_HIGH_CRTC_SHIFT 1\n-\n-#define _DRM_VBLANK_TYPES_MASK (_DRM_VBLANK_ABSOLUTE | _DRM_VBLANK_RELATIVE)\n-#define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_EVENT | _DRM_VBLANK_SIGNAL | \\\n-\t\t\t\t_DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS)\n-\n-struct drm_wait_vblank_request {\n-\tenum drm_vblank_seq_type type;\n-\tunsigned int sequence;\n-\tunsigned long signal;\n-};\n-\n-struct drm_wait_vblank_reply {\n-\tenum drm_vblank_seq_type type;\n-\tunsigned int sequence;\n-\tlong tval_sec;\n-\tlong tval_usec;\n-};\n-\n-/**\n- * DRM_IOCTL_WAIT_VBLANK ioctl argument type.\n- *\n- * \\sa drmWaitVBlank().\n- */\n-union drm_wait_vblank {\n-\tstruct drm_wait_vblank_request request;\n-\tstruct drm_wait_vblank_reply reply;\n-};\n-\n-#define _DRM_PRE_MODESET 1\n-#define _DRM_POST_MODESET 2\n-\n-/**\n- * DRM_IOCTL_MODESET_CTL ioctl argument type\n- *\n- * \\sa drmModesetCtl().\n- */\n-struct drm_modeset_ctl {\n-\t__u32 crtc;\n-\t__u32 cmd;\n-};\n-\n-/**\n- * DRM_IOCTL_AGP_ENABLE ioctl argument type.\n- *\n- * \\sa drmAgpEnable().\n- */\n-struct drm_agp_mode {\n-\tunsigned long mode;\t/**< AGP mode */\n-};\n-\n-/**\n- * DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type.\n- *\n- * \\sa drmAgpAlloc() and drmAgpFree().\n- */\n-struct drm_agp_buffer {\n-\tunsigned long size;\t/**< In bytes -- will round to page boundary */\n-\tunsigned long handle;\t/**< Used for binding / unbinding */\n-\tunsigned long type;\t/**< Type of memory to allocate */\n-\tunsigned long physical;\t/**< Physical used by i810 */\n-};\n-\n-/**\n- * DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type.\n- *\n- * \\sa drmAgpBind() and drmAgpUnbind().\n- */\n-struct drm_agp_binding {\n-\tunsigned long handle;\t/**< From drm_agp_buffer */\n-\tunsigned long offset;\t/**< In bytes -- will round to page boundary */\n-};\n-\n-/**\n- * DRM_IOCTL_AGP_INFO ioctl argument type.\n- *\n- * \\sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(),\n- * drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(),\n- * drmAgpVendorId() and drmAgpDeviceId().\n- */\n-struct drm_agp_info {\n-\tint agp_version_major;\n-\tint agp_version_minor;\n-\tunsigned long mode;\n-\tunsigned long aperture_base;\t/* physical address */\n-\tunsigned long aperture_size;\t/* bytes */\n-\tunsigned long memory_allowed;\t/* bytes */\n-\tunsigned long memory_used;\n-\n-\t/* PCI information */\n-\tunsigned short id_vendor;\n-\tunsigned short id_device;\n-};\n-\n-/**\n- * DRM_IOCTL_SG_ALLOC ioctl argument type.\n- */\n-struct drm_scatter_gather {\n-\tunsigned long size;\t/**< In bytes -- will round to page boundary */\n-\tunsigned long handle;\t/**< Used for mapping / unmapping */\n-};\n-\n-/**\n- * DRM_IOCTL_SET_VERSION ioctl argument type.\n- */\n-struct drm_set_version {\n-\tint drm_di_major;\n-\tint drm_di_minor;\n-\tint drm_dd_major;\n-\tint drm_dd_minor;\n-};\n-\n-/** DRM_IOCTL_GEM_CLOSE ioctl argument type */\n-struct drm_gem_close {\n-\t/** Handle of the object to be closed. */\n-\t__u32 handle;\n-\t__u32 pad;\n-};\n-\n-/** DRM_IOCTL_GEM_FLINK ioctl argument type */\n-struct drm_gem_flink {\n-\t/** Handle for the object being named */\n-\t__u32 handle;\n-\n-\t/** Returned global name */\n-\t__u32 name;\n-};\n-\n-/** DRM_IOCTL_GEM_OPEN ioctl argument type */\n-struct drm_gem_open {\n-\t/** Name of object being opened */\n-\t__u32 name;\n-\n-\t/** Returned handle for the object */\n-\t__u32 handle;\n-\n-\t/** Returned size of the object */\n-\t__u64 size;\n-};\n-\n-#define DRM_CAP_DUMB_BUFFER\t\t0x1\n-#define DRM_CAP_VBLANK_HIGH_CRTC\t0x2\n-#define DRM_CAP_DUMB_PREFERRED_DEPTH\t0x3\n-#define DRM_CAP_DUMB_PREFER_SHADOW\t0x4\n-#define DRM_CAP_PRIME\t\t\t0x5\n-#define DRM_PRIME_CAP_IMPORT\t\t0x1\n-#define DRM_PRIME_CAP_EXPORT\t\t0x2\n-#define DRM_CAP_TIMESTAMP_MONOTONIC\t0x6\n-#define DRM_CAP_ASYNC_PAGE_FLIP\t\t0x7\n-/*\n- * The CURSOR_WIDTH and CURSOR_HEIGHT capabilities return a valid widthxheight\n- * combination for the hardware cursor. The intention is that a hardware\n- * agnostic userspace can query a cursor plane size to use.\n- *\n- * Note that the cross-driver contract is to merely return a valid size;\n- * drivers are free to attach another meaning on top, eg. i915 returns the\n- * maximum plane size.\n- */\n-#define DRM_CAP_CURSOR_WIDTH\t\t0x8\n-#define DRM_CAP_CURSOR_HEIGHT\t\t0x9\n-#define DRM_CAP_ADDFB2_MODIFIERS\t0x10\n-#define DRM_CAP_PAGE_FLIP_TARGET\t0x11\n-#define DRM_CAP_CRTC_IN_VBLANK_EVENT\t0x12\n-#define DRM_CAP_SYNCOBJ\t\t0x13\n-#define DRM_CAP_SYNCOBJ_TIMELINE\t0x14\n-\n-/** DRM_IOCTL_GET_CAP ioctl argument type */\n-struct drm_get_cap {\n-\t__u64 capability;\n-\t__u64 value;\n-};\n-\n-/**\n- * DRM_CLIENT_CAP_STEREO_3D\n- *\n- * if set to 1, the DRM core will expose the stereo 3D capabilities of the\n- * monitor by advertising the supported 3D layouts in the flags of struct\n- * drm_mode_modeinfo.\n- */\n-#define DRM_CLIENT_CAP_STEREO_3D\t1\n-\n-/**\n- * DRM_CLIENT_CAP_UNIVERSAL_PLANES\n- *\n- * If set to 1, the DRM core will expose all planes (overlay, primary, and\n- * cursor) to userspace.\n- */\n-#define DRM_CLIENT_CAP_UNIVERSAL_PLANES 2\n-\n-/**\n- * DRM_CLIENT_CAP_ATOMIC\n- *\n- * If set to 1, the DRM core will expose atomic properties to userspace\n- */\n-#define DRM_CLIENT_CAP_ATOMIC\t3\n-\n-/**\n- * DRM_CLIENT_CAP_ASPECT_RATIO\n- *\n- * If set to 1, the DRM core will provide aspect ratio information in modes.\n- */\n-#define DRM_CLIENT_CAP_ASPECT_RATIO 4\n-\n-/**\n- * DRM_CLIENT_CAP_WRITEBACK_CONNECTORS\n- *\n- * If set to 1, the DRM core will expose special connectors to be used for\n- * writing back to memory the scene setup in the commit. Depends on client\n- * also supporting DRM_CLIENT_CAP_ATOMIC\n- */\n-#define DRM_CLIENT_CAP_WRITEBACK_CONNECTORS\t5\n-\n-/** DRM_IOCTL_SET_CLIENT_CAP ioctl argument type */\n-struct drm_set_client_cap {\n-\t__u64 capability;\n-\t__u64 value;\n-};\n-\n-#define DRM_RDWR O_RDWR\n-#define DRM_CLOEXEC O_CLOEXEC\n-struct drm_prime_handle {\n-\t__u32 handle;\n-\n-\t/** Flags.. only applicable for handle->fd */\n-\t__u32 flags;\n-\n-\t/** Returned dmabuf file descriptor */\n-\t__s32 fd;\n-};\n-\n-struct drm_syncobj_create {\n-\t__u32 handle;\n-#define DRM_SYNCOBJ_CREATE_SIGNALED (1 << 0)\n-\t__u32 flags;\n-};\n-\n-struct drm_syncobj_destroy {\n-\t__u32 handle;\n-\t__u32 pad;\n-};\n-\n-#define DRM_SYNCOBJ_FD_TO_HANDLE_FLAGS_IMPORT_SYNC_FILE (1 << 0)\n-#define DRM_SYNCOBJ_HANDLE_TO_FD_FLAGS_EXPORT_SYNC_FILE (1 << 0)\n-struct drm_syncobj_handle {\n-\t__u32 handle;\n-\t__u32 flags;\n-\n-\t__s32 fd;\n-\t__u32 pad;\n-};\n-\n-struct drm_syncobj_transfer {\n-\t__u32 src_handle;\n-\t__u32 dst_handle;\n-\t__u64 src_point;\n-\t__u64 dst_point;\n-\t__u32 flags;\n-\t__u32 pad;\n-};\n-\n-#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL (1 << 0)\n-#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT (1 << 1)\n-#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE (1 << 2) /* wait for time point to become available */\n-struct drm_syncobj_wait {\n-\t__u64 handles;\n-\t/* absolute timeout */\n-\t__s64 timeout_nsec;\n-\t__u32 count_handles;\n-\t__u32 flags;\n-\t__u32 first_signaled; /* only valid when not waiting all */\n-\t__u32 pad;\n-};\n-\n-struct drm_syncobj_timeline_wait {\n-\t__u64 handles;\n-\t/* wait on specific timeline point for every handles*/\n-\t__u64 points;\n-\t/* absolute timeout */\n-\t__s64 timeout_nsec;\n-\t__u32 count_handles;\n-\t__u32 flags;\n-\t__u32 first_signaled; /* only valid when not waiting all */\n-\t__u32 pad;\n-};\n-\n-\n-struct drm_syncobj_array {\n-\t__u64 handles;\n-\t__u32 count_handles;\n-\t__u32 pad;\n-};\n-\n-struct drm_syncobj_timeline_array {\n-\t__u64 handles;\n-\t__u64 points;\n-\t__u32 count_handles;\n-\t__u32 pad;\n-};\n-\n-\n-/* Query current scanout sequence number */\n-struct drm_crtc_get_sequence {\n-\t__u32 crtc_id;\t\t/* requested crtc_id */\n-\t__u32 active;\t\t/* return: crtc output is active */\n-\t__u64 sequence;\t\t/* return: most recent vblank sequence */\n-\t__s64 sequence_ns;\t/* return: most recent time of first pixel out */\n-};\n-\n-/* Queue event to be delivered at specified sequence. Time stamp marks\n- * when the first pixel of the refresh cycle leaves the display engine\n- * for the display\n- */\n-#define DRM_CRTC_SEQUENCE_RELATIVE\t\t0x00000001\t/* sequence is relative to current */\n-#define DRM_CRTC_SEQUENCE_NEXT_ON_MISS\t\t0x00000002\t/* Use next sequence if we've missed */\n-\n-struct drm_crtc_queue_sequence {\n-\t__u32 crtc_id;\n-\t__u32 flags;\n-\t__u64 sequence;\t\t/* on input, target sequence. on output, actual sequence */\n-\t__u64 user_data;\t/* user data passed to event */\n-};\n-\n-#if defined(__cplusplus)\n-}\n-#endif\n-\n-#include \"drm_mode.h\"\n-\n-#if defined(__cplusplus)\n-extern \"C\" {\n-#endif\n-\n-#define DRM_IOCTL_BASE\t\t\t'd'\n-#define DRM_IO(nr)\t\t\t_IO(DRM_IOCTL_BASE,nr)\n-#define DRM_IOR(nr,type)\t\t_IOR(DRM_IOCTL_BASE,nr,type)\n-#define DRM_IOW(nr,type)\t\t_IOW(DRM_IOCTL_BASE,nr,type)\n-#define DRM_IOWR(nr,type)\t\t_IOWR(DRM_IOCTL_BASE,nr,type)\n-\n-#define DRM_IOCTL_VERSION\t\tDRM_IOWR(0x00, struct drm_version)\n-#define DRM_IOCTL_GET_UNIQUE\t\tDRM_IOWR(0x01, struct drm_unique)\n-#define DRM_IOCTL_GET_MAGIC\t\tDRM_IOR( 0x02, struct drm_auth)\n-#define DRM_IOCTL_IRQ_BUSID\t\tDRM_IOWR(0x03, struct drm_irq_busid)\n-#define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, struct drm_map)\n-#define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, struct drm_client)\n-#define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, struct drm_stats)\n-#define DRM_IOCTL_SET_VERSION\t\tDRM_IOWR(0x07, struct drm_set_version)\n-#define DRM_IOCTL_MODESET_CTL DRM_IOW(0x08, struct drm_modeset_ctl)\n-#define DRM_IOCTL_GEM_CLOSE\t\tDRM_IOW (0x09, struct drm_gem_close)\n-#define DRM_IOCTL_GEM_FLINK\t\tDRM_IOWR(0x0a, struct drm_gem_flink)\n-#define DRM_IOCTL_GEM_OPEN\t\tDRM_IOWR(0x0b, struct drm_gem_open)\n-#define DRM_IOCTL_GET_CAP\t\tDRM_IOWR(0x0c, struct drm_get_cap)\n-#define DRM_IOCTL_SET_CLIENT_CAP\tDRM_IOW( 0x0d, struct drm_set_client_cap)\n-\n-#define DRM_IOCTL_SET_UNIQUE\t\tDRM_IOW( 0x10, struct drm_unique)\n-#define DRM_IOCTL_AUTH_MAGIC\t\tDRM_IOW( 0x11, struct drm_auth)\n-#define DRM_IOCTL_BLOCK\t\t\tDRM_IOWR(0x12, struct drm_block)\n-#define DRM_IOCTL_UNBLOCK\t\tDRM_IOWR(0x13, struct drm_block)\n-#define DRM_IOCTL_CONTROL\t\tDRM_IOW( 0x14, struct drm_control)\n-#define DRM_IOCTL_ADD_MAP\t\tDRM_IOWR(0x15, struct drm_map)\n-#define DRM_IOCTL_ADD_BUFS\t\tDRM_IOWR(0x16, struct drm_buf_desc)\n-#define DRM_IOCTL_MARK_BUFS\t\tDRM_IOW( 0x17, struct drm_buf_desc)\n-#define DRM_IOCTL_INFO_BUFS\t\tDRM_IOWR(0x18, struct drm_buf_info)\n-#define DRM_IOCTL_MAP_BUFS\t\tDRM_IOWR(0x19, struct drm_buf_map)\n-#define DRM_IOCTL_FREE_BUFS\t\tDRM_IOW( 0x1a, struct drm_buf_free)\n-\n-#define DRM_IOCTL_RM_MAP\t\tDRM_IOW( 0x1b, struct drm_map)\n-\n-#define DRM_IOCTL_SET_SAREA_CTX\t\tDRM_IOW( 0x1c, struct drm_ctx_priv_map)\n-#define DRM_IOCTL_GET_SAREA_CTX \tDRM_IOWR(0x1d, struct drm_ctx_priv_map)\n-\n-#define DRM_IOCTL_SET_MASTER DRM_IO(0x1e)\n-#define DRM_IOCTL_DROP_MASTER DRM_IO(0x1f)\n-\n-#define DRM_IOCTL_ADD_CTX\t\tDRM_IOWR(0x20, struct drm_ctx)\n-#define DRM_IOCTL_RM_CTX\t\tDRM_IOWR(0x21, struct drm_ctx)\n-#define DRM_IOCTL_MOD_CTX\t\tDRM_IOW( 0x22, struct drm_ctx)\n-#define DRM_IOCTL_GET_CTX\t\tDRM_IOWR(0x23, struct drm_ctx)\n-#define DRM_IOCTL_SWITCH_CTX\t\tDRM_IOW( 0x24, struct drm_ctx)\n-#define DRM_IOCTL_NEW_CTX\t\tDRM_IOW( 0x25, struct drm_ctx)\n-#define DRM_IOCTL_RES_CTX\t\tDRM_IOWR(0x26, struct drm_ctx_res)\n-#define DRM_IOCTL_ADD_DRAW\t\tDRM_IOWR(0x27, struct drm_draw)\n-#define DRM_IOCTL_RM_DRAW\t\tDRM_IOWR(0x28, struct drm_draw)\n-#define DRM_IOCTL_DMA\t\t\tDRM_IOWR(0x29, struct drm_dma)\n-#define DRM_IOCTL_LOCK\t\t\tDRM_IOW( 0x2a, struct drm_lock)\n-#define DRM_IOCTL_UNLOCK\t\tDRM_IOW( 0x2b, struct drm_lock)\n-#define DRM_IOCTL_FINISH\t\tDRM_IOW( 0x2c, struct drm_lock)\n-\n-#define DRM_IOCTL_PRIME_HANDLE_TO_FD DRM_IOWR(0x2d, struct drm_prime_handle)\n-#define DRM_IOCTL_PRIME_FD_TO_HANDLE DRM_IOWR(0x2e, struct drm_prime_handle)\n-\n-#define DRM_IOCTL_AGP_ACQUIRE\t\tDRM_IO( 0x30)\n-#define DRM_IOCTL_AGP_RELEASE\t\tDRM_IO( 0x31)\n-#define DRM_IOCTL_AGP_ENABLE\t\tDRM_IOW( 0x32, struct drm_agp_mode)\n-#define DRM_IOCTL_AGP_INFO\t\tDRM_IOR( 0x33, struct drm_agp_info)\n-#define DRM_IOCTL_AGP_ALLOC\t\tDRM_IOWR(0x34, struct drm_agp_buffer)\n-#define DRM_IOCTL_AGP_FREE\t\tDRM_IOW( 0x35, struct drm_agp_buffer)\n-#define DRM_IOCTL_AGP_BIND\t\tDRM_IOW( 0x36, struct drm_agp_binding)\n-#define DRM_IOCTL_AGP_UNBIND\t\tDRM_IOW( 0x37, struct drm_agp_binding)\n-\n-#define DRM_IOCTL_SG_ALLOC\t\tDRM_IOWR(0x38, struct drm_scatter_gather)\n-#define DRM_IOCTL_SG_FREE\t\tDRM_IOW( 0x39, struct drm_scatter_gather)\n-\n-#define DRM_IOCTL_WAIT_VBLANK\t\tDRM_IOWR(0x3a, union drm_wait_vblank)\n-\n-#define DRM_IOCTL_CRTC_GET_SEQUENCE\tDRM_IOWR(0x3b, struct drm_crtc_get_sequence)\n-#define DRM_IOCTL_CRTC_QUEUE_SEQUENCE\tDRM_IOWR(0x3c, struct drm_crtc_queue_sequence)\n-\n-#define DRM_IOCTL_UPDATE_DRAW\t\tDRM_IOW(0x3f, struct drm_update_draw)\n-\n-#define DRM_IOCTL_MODE_GETRESOURCES\tDRM_IOWR(0xA0, struct drm_mode_card_res)\n-#define DRM_IOCTL_MODE_GETCRTC\t\tDRM_IOWR(0xA1, struct drm_mode_crtc)\n-#define DRM_IOCTL_MODE_SETCRTC\t\tDRM_IOWR(0xA2, struct drm_mode_crtc)\n-#define DRM_IOCTL_MODE_CURSOR\t\tDRM_IOWR(0xA3, struct drm_mode_cursor)\n-#define DRM_IOCTL_MODE_GETGAMMA\t\tDRM_IOWR(0xA4, struct drm_mode_crtc_lut)\n-#define DRM_IOCTL_MODE_SETGAMMA\t\tDRM_IOWR(0xA5, struct drm_mode_crtc_lut)\n-#define DRM_IOCTL_MODE_GETENCODER\tDRM_IOWR(0xA6, struct drm_mode_get_encoder)\n-#define DRM_IOCTL_MODE_GETCONNECTOR\tDRM_IOWR(0xA7, struct drm_mode_get_connector)\n-#define DRM_IOCTL_MODE_ATTACHMODE\tDRM_IOWR(0xA8, struct drm_mode_mode_cmd) /* deprecated (never worked) */\n-#define DRM_IOCTL_MODE_DETACHMODE\tDRM_IOWR(0xA9, struct drm_mode_mode_cmd) /* deprecated (never worked) */\n-\n-#define DRM_IOCTL_MODE_GETPROPERTY\tDRM_IOWR(0xAA, struct drm_mode_get_property)\n-#define DRM_IOCTL_MODE_SETPROPERTY\tDRM_IOWR(0xAB, struct drm_mode_connector_set_property)\n-#define DRM_IOCTL_MODE_GETPROPBLOB\tDRM_IOWR(0xAC, struct drm_mode_get_blob)\n-#define DRM_IOCTL_MODE_GETFB\t\tDRM_IOWR(0xAD, struct drm_mode_fb_cmd)\n-#define DRM_IOCTL_MODE_ADDFB\t\tDRM_IOWR(0xAE, struct drm_mode_fb_cmd)\n-#define DRM_IOCTL_MODE_RMFB\t\tDRM_IOWR(0xAF, unsigned int)\n-#define DRM_IOCTL_MODE_PAGE_FLIP\tDRM_IOWR(0xB0, struct drm_mode_crtc_page_flip)\n-#define DRM_IOCTL_MODE_DIRTYFB\t\tDRM_IOWR(0xB1, struct drm_mode_fb_dirty_cmd)\n-\n-#define DRM_IOCTL_MODE_CREATE_DUMB DRM_IOWR(0xB2, struct drm_mode_create_dumb)\n-#define DRM_IOCTL_MODE_MAP_DUMB DRM_IOWR(0xB3, struct drm_mode_map_dumb)\n-#define DRM_IOCTL_MODE_DESTROY_DUMB DRM_IOWR(0xB4, struct drm_mode_destroy_dumb)\n-#define DRM_IOCTL_MODE_GETPLANERESOURCES DRM_IOWR(0xB5, struct drm_mode_get_plane_res)\n-#define DRM_IOCTL_MODE_GETPLANE\tDRM_IOWR(0xB6, struct drm_mode_get_plane)\n-#define DRM_IOCTL_MODE_SETPLANE\tDRM_IOWR(0xB7, struct drm_mode_set_plane)\n-#define DRM_IOCTL_MODE_ADDFB2\t\tDRM_IOWR(0xB8, struct drm_mode_fb_cmd2)\n-#define DRM_IOCTL_MODE_OBJ_GETPROPERTIES\tDRM_IOWR(0xB9, struct drm_mode_obj_get_properties)\n-#define DRM_IOCTL_MODE_OBJ_SETPROPERTY\tDRM_IOWR(0xBA, struct drm_mode_obj_set_property)\n-#define DRM_IOCTL_MODE_CURSOR2\t\tDRM_IOWR(0xBB, struct drm_mode_cursor2)\n-#define DRM_IOCTL_MODE_ATOMIC\t\tDRM_IOWR(0xBC, struct drm_mode_atomic)\n-#define DRM_IOCTL_MODE_CREATEPROPBLOB\tDRM_IOWR(0xBD, struct drm_mode_create_blob)\n-#define DRM_IOCTL_MODE_DESTROYPROPBLOB\tDRM_IOWR(0xBE, struct drm_mode_destroy_blob)\n-\n-#define DRM_IOCTL_SYNCOBJ_CREATE\tDRM_IOWR(0xBF, struct drm_syncobj_create)\n-#define DRM_IOCTL_SYNCOBJ_DESTROY\tDRM_IOWR(0xC0, struct drm_syncobj_destroy)\n-#define DRM_IOCTL_SYNCOBJ_HANDLE_TO_FD\tDRM_IOWR(0xC1, struct drm_syncobj_handle)\n-#define DRM_IOCTL_SYNCOBJ_FD_TO_HANDLE\tDRM_IOWR(0xC2, struct drm_syncobj_handle)\n-#define DRM_IOCTL_SYNCOBJ_WAIT\t\tDRM_IOWR(0xC3, struct drm_syncobj_wait)\n-#define DRM_IOCTL_SYNCOBJ_RESET\t\tDRM_IOWR(0xC4, struct drm_syncobj_array)\n-#define DRM_IOCTL_SYNCOBJ_SIGNAL\tDRM_IOWR(0xC5, struct drm_syncobj_array)\n-\n-#define DRM_IOCTL_MODE_CREATE_LEASE\tDRM_IOWR(0xC6, struct drm_mode_create_lease)\n-#define DRM_IOCTL_MODE_LIST_LESSEES\tDRM_IOWR(0xC7, struct drm_mode_list_lessees)\n-#define DRM_IOCTL_MODE_GET_LEASE\tDRM_IOWR(0xC8, struct drm_mode_get_lease)\n-#define DRM_IOCTL_MODE_REVOKE_LEASE\tDRM_IOWR(0xC9, struct drm_mode_revoke_lease)\n-\n-#define DRM_IOCTL_SYNCOBJ_TIMELINE_WAIT\tDRM_IOWR(0xCA, struct drm_syncobj_timeline_wait)\n-#define DRM_IOCTL_SYNCOBJ_QUERY\t\tDRM_IOWR(0xCB, struct drm_syncobj_timeline_array)\n-#define DRM_IOCTL_SYNCOBJ_TRANSFER\tDRM_IOWR(0xCC, struct drm_syncobj_transfer)\n-#define DRM_IOCTL_SYNCOBJ_TIMELINE_SIGNAL\tDRM_IOWR(0xCD, struct drm_syncobj_timeline_array)\n-\n-/**\n- * Device specific ioctls should only be in their respective headers\n- * The device specific ioctl range is from 0x40 to 0x9f.\n- * Generic IOCTLS restart at 0xA0.\n- *\n- * \\sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and\n- * drmCommandReadWrite().\n- */\n-#define DRM_COMMAND_BASE 0x40\n-#define DRM_COMMAND_END\t\t\t0xA0\n-\n-/**\n- * Header for events written back to userspace on the drm fd. The\n- * type defines the type of event, the length specifies the total\n- * length of the event (including the header), and user_data is\n- * typically a 64 bit value passed with the ioctl that triggered the\n- * event. A read on the drm fd will always only return complete\n- * events, that is, if for example the read buffer is 100 bytes, and\n- * there are two 64 byte events pending, only one will be returned.\n- *\n- * Event types 0 - 0x7fffffff are generic drm events, 0x80000000 and\n- * up are chipset specific.\n- */\n-struct drm_event {\n-\t__u32 type;\n-\t__u32 length;\n-};\n-\n-#define DRM_EVENT_VBLANK 0x01\n-#define DRM_EVENT_FLIP_COMPLETE 0x02\n-#define DRM_EVENT_CRTC_SEQUENCE\t0x03\n-\n-struct drm_event_vblank {\n-\tstruct drm_event base;\n-\t__u64 user_data;\n-\t__u32 tv_sec;\n-\t__u32 tv_usec;\n-\t__u32 sequence;\n-\t__u32 crtc_id; /* 0 on older kernels that do not support this */\n-};\n-\n-/* Event delivered at sequence. Time stamp marks when the first pixel\n- * of the refresh cycle leaves the display engine for the display\n- */\n-struct drm_event_crtc_sequence {\n-\tstruct drm_event\tbase;\n-\t__u64\t\t\tuser_data;\n-\t__s64\t\t\ttime_ns;\n-\t__u64\t\t\tsequence;\n-};\n-\n-/* typedef area */\n-typedef struct drm_clip_rect drm_clip_rect_t;\n-typedef struct drm_drawable_info drm_drawable_info_t;\n-typedef struct drm_tex_region drm_tex_region_t;\n-typedef struct drm_hw_lock drm_hw_lock_t;\n-typedef struct drm_version drm_version_t;\n-typedef struct drm_unique drm_unique_t;\n-typedef struct drm_list drm_list_t;\n-typedef struct drm_block drm_block_t;\n-typedef struct drm_control drm_control_t;\n-typedef enum drm_map_type drm_map_type_t;\n-typedef enum drm_map_flags drm_map_flags_t;\n-typedef struct drm_ctx_priv_map drm_ctx_priv_map_t;\n-typedef struct drm_map drm_map_t;\n-typedef struct drm_client drm_client_t;\n-typedef enum drm_stat_type drm_stat_type_t;\n-typedef struct drm_stats drm_stats_t;\n-typedef enum drm_lock_flags drm_lock_flags_t;\n-typedef struct drm_lock drm_lock_t;\n-typedef enum drm_dma_flags drm_dma_flags_t;\n-typedef struct drm_buf_desc drm_buf_desc_t;\n-typedef struct drm_buf_info drm_buf_info_t;\n-typedef struct drm_buf_free drm_buf_free_t;\n-typedef struct drm_buf_pub drm_buf_pub_t;\n-typedef struct drm_buf_map drm_buf_map_t;\n-typedef struct drm_dma drm_dma_t;\n-typedef union drm_wait_vblank drm_wait_vblank_t;\n-typedef struct drm_agp_mode drm_agp_mode_t;\n-typedef enum drm_ctx_flags drm_ctx_flags_t;\n-typedef struct drm_ctx drm_ctx_t;\n-typedef struct drm_ctx_res drm_ctx_res_t;\n-typedef struct drm_draw drm_draw_t;\n-typedef struct drm_update_draw drm_update_draw_t;\n-typedef struct drm_auth drm_auth_t;\n-typedef struct drm_irq_busid drm_irq_busid_t;\n-typedef enum drm_vblank_seq_type drm_vblank_seq_type_t;\n-\n-typedef struct drm_agp_buffer drm_agp_buffer_t;\n-typedef struct drm_agp_binding drm_agp_binding_t;\n-typedef struct drm_agp_info drm_agp_info_t;\n-typedef struct drm_scatter_gather drm_scatter_gather_t;\n-typedef struct drm_set_version drm_set_version_t;\n-\n-#if defined(__cplusplus)\n-}\n-#endif\n-\n-#endif\ndiff --git a/include/linux/drm_mode.h b/include/linux/drm_mode.h\ndeleted file mode 100644\nindex 735c8cfdaaa1..000000000000\n--- a/include/linux/drm_mode.h\n+++ /dev/null\n@@ -1,1032 +0,0 @@\n-/*\n- * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>\n- * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>\n- * Copyright (c) 2008 Red Hat Inc.\n- * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA\n- * Copyright (c) 2007-2008 Intel Corporation\n- *\n- * Permission is hereby granted, free of charge, to any person obtaining a\n- * copy of this software and associated documentation files (the \"Software\"),\n- * to deal in the Software without restriction, including without limitation\n- * the rights to use, copy, modify, merge, publish, distribute, sublicense,\n- * and/or sell copies of the Software, and to permit persons to whom the\n- * Software is furnished to do so, subject to the following conditions:\n- *\n- * The above copyright notice and this permission notice shall be included in\n- * all copies or substantial portions of the Software.\n- *\n- * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\n- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,\n- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE\n- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER\n- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING\n- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS\n- * IN THE SOFTWARE.\n- */\n-\n-#ifndef _DRM_MODE_H\n-#define _DRM_MODE_H\n-\n-#include \"drm.h\"\n-\n-#if defined(__cplusplus)\n-extern \"C\" {\n-#endif\n-\n-/**\n- * DOC: overview\n- *\n- * DRM exposes many UAPI and structure definition to have a consistent\n- * and standardized interface with user.\n- * Userspace can refer to these structure definitions and UAPI formats\n- * to communicate to driver\n- */\n-\n-#define DRM_CONNECTOR_NAME_LEN\t32\n-#define DRM_DISPLAY_MODE_LEN\t32\n-#define DRM_PROP_NAME_LEN\t32\n-\n-#define DRM_MODE_TYPE_BUILTIN\t(1<<0) /* deprecated */\n-#define DRM_MODE_TYPE_CLOCK_C\t((1<<1) | DRM_MODE_TYPE_BUILTIN) /* deprecated */\n-#define DRM_MODE_TYPE_CRTC_C\t((1<<2) | DRM_MODE_TYPE_BUILTIN) /* deprecated */\n-#define DRM_MODE_TYPE_PREFERRED\t(1<<3)\n-#define DRM_MODE_TYPE_DEFAULT\t(1<<4) /* deprecated */\n-#define DRM_MODE_TYPE_USERDEF\t(1<<5)\n-#define DRM_MODE_TYPE_DRIVER\t(1<<6)\n-\n-#define DRM_MODE_TYPE_ALL\t(DRM_MODE_TYPE_PREFERRED |\t\\\n-\t\t\t\t DRM_MODE_TYPE_USERDEF |\t\\\n-\t\t\t\t DRM_MODE_TYPE_DRIVER)\n-\n-/* Video mode flags */\n-/* bit compatible with the xrandr RR_ definitions (bits 0-13)\n- *\n- * ABI warning: Existing userspace really expects\n- * the mode flags to match the xrandr definitions. Any\n- * changes that don't match the xrandr definitions will\n- * likely need a new client cap or some other mechanism\n- * to avoid breaking existing userspace. This includes\n- * allocating new flags in the previously unused bits!\n- */\n-#define DRM_MODE_FLAG_PHSYNC\t\t\t(1<<0)\n-#define DRM_MODE_FLAG_NHSYNC\t\t\t(1<<1)\n-#define DRM_MODE_FLAG_PVSYNC\t\t\t(1<<2)\n-#define DRM_MODE_FLAG_NVSYNC\t\t\t(1<<3)\n-#define DRM_MODE_FLAG_INTERLACE\t\t\t(1<<4)\n-#define DRM_MODE_FLAG_DBLSCAN\t\t\t(1<<5)\n-#define DRM_MODE_FLAG_CSYNC\t\t\t(1<<6)\n-#define DRM_MODE_FLAG_PCSYNC\t\t\t(1<<7)\n-#define DRM_MODE_FLAG_NCSYNC\t\t\t(1<<8)\n-#define DRM_MODE_FLAG_HSKEW\t\t\t(1<<9) /* hskew provided */\n-#define DRM_MODE_FLAG_BCAST\t\t\t(1<<10) /* deprecated */\n-#define DRM_MODE_FLAG_PIXMUX\t\t\t(1<<11) /* deprecated */\n-#define DRM_MODE_FLAG_DBLCLK\t\t\t(1<<12)\n-#define DRM_MODE_FLAG_CLKDIV2\t\t\t(1<<13)\n- /*\n- * When adding a new stereo mode don't forget to adjust DRM_MODE_FLAGS_3D_MAX\n- * (define not exposed to user space).\n- */\n-#define DRM_MODE_FLAG_3D_MASK\t\t\t(0x1f<<14)\n-#define DRM_MODE_FLAG_3D_NONE\t\t(0<<14)\n-#define DRM_MODE_FLAG_3D_FRAME_PACKING\t\t(1<<14)\n-#define DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE\t(2<<14)\n-#define DRM_MODE_FLAG_3D_LINE_ALTERNATIVE\t(3<<14)\n-#define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL\t(4<<14)\n-#define DRM_MODE_FLAG_3D_L_DEPTH\t\t(5<<14)\n-#define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH\t(6<<14)\n-#define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM\t(7<<14)\n-#define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF\t(8<<14)\n-\n-/* Picture aspect ratio options */\n-#define DRM_MODE_PICTURE_ASPECT_NONE\t\t0\n-#define DRM_MODE_PICTURE_ASPECT_4_3\t\t1\n-#define DRM_MODE_PICTURE_ASPECT_16_9\t\t2\n-#define DRM_MODE_PICTURE_ASPECT_64_27\t\t3\n-#define DRM_MODE_PICTURE_ASPECT_256_135\t\t4\n-\n-/* Content type options */\n-#define DRM_MODE_CONTENT_TYPE_NO_DATA\t\t0\n-#define DRM_MODE_CONTENT_TYPE_GRAPHICS\t\t1\n-#define DRM_MODE_CONTENT_TYPE_PHOTO\t\t2\n-#define DRM_MODE_CONTENT_TYPE_CINEMA\t\t3\n-#define DRM_MODE_CONTENT_TYPE_GAME\t\t4\n-\n-/* Aspect ratio flag bitmask (4 bits 22:19) */\n-#define DRM_MODE_FLAG_PIC_AR_MASK\t\t(0x0F<<19)\n-#define DRM_MODE_FLAG_PIC_AR_NONE \\\n-\t\t\t(DRM_MODE_PICTURE_ASPECT_NONE<<19)\n-#define DRM_MODE_FLAG_PIC_AR_4_3 \\\n-\t\t\t(DRM_MODE_PICTURE_ASPECT_4_3<<19)\n-#define DRM_MODE_FLAG_PIC_AR_16_9 \\\n-\t\t\t(DRM_MODE_PICTURE_ASPECT_16_9<<19)\n-#define DRM_MODE_FLAG_PIC_AR_64_27 \\\n-\t\t\t(DRM_MODE_PICTURE_ASPECT_64_27<<19)\n-#define DRM_MODE_FLAG_PIC_AR_256_135 \\\n-\t\t\t(DRM_MODE_PICTURE_ASPECT_256_135<<19)\n-\n-#define DRM_MODE_FLAG_ALL\t(DRM_MODE_FLAG_PHSYNC |\t\t\\\n-\t\t\t\t DRM_MODE_FLAG_NHSYNC |\t\t\\\n-\t\t\t\t DRM_MODE_FLAG_PVSYNC |\t\t\\\n-\t\t\t\t DRM_MODE_FLAG_NVSYNC |\t\t\\\n-\t\t\t\t DRM_MODE_FLAG_INTERLACE |\t\\\n-\t\t\t\t DRM_MODE_FLAG_DBLSCAN |\t\\\n-\t\t\t\t DRM_MODE_FLAG_CSYNC |\t\t\\\n-\t\t\t\t DRM_MODE_FLAG_PCSYNC |\t\t\\\n-\t\t\t\t DRM_MODE_FLAG_NCSYNC |\t\t\\\n-\t\t\t\t DRM_MODE_FLAG_HSKEW |\t\t\\\n-\t\t\t\t DRM_MODE_FLAG_DBLCLK |\t\t\\\n-\t\t\t\t DRM_MODE_FLAG_CLKDIV2 |\t\\\n-\t\t\t\t DRM_MODE_FLAG_3D_MASK)\n-\n-/* DPMS flags */\n-/* bit compatible with the xorg definitions. */\n-#define DRM_MODE_DPMS_ON\t0\n-#define DRM_MODE_DPMS_STANDBY\t1\n-#define DRM_MODE_DPMS_SUSPEND\t2\n-#define DRM_MODE_DPMS_OFF\t3\n-\n-/* Scaling mode options */\n-#define DRM_MODE_SCALE_NONE\t\t0 /* Unmodified timing (display or\n-\t\t\t\t\t software can still scale) */\n-#define DRM_MODE_SCALE_FULLSCREEN\t1 /* Full screen, ignore aspect */\n-#define DRM_MODE_SCALE_CENTER\t\t2 /* Centered, no scaling */\n-#define DRM_MODE_SCALE_ASPECT\t\t3 /* Full screen, preserve aspect */\n-\n-/* Dithering mode options */\n-#define DRM_MODE_DITHERING_OFF\t0\n-#define DRM_MODE_DITHERING_ON\t1\n-#define DRM_MODE_DITHERING_AUTO 2\n-\n-/* Dirty info options */\n-#define DRM_MODE_DIRTY_OFF 0\n-#define DRM_MODE_DIRTY_ON 1\n-#define DRM_MODE_DIRTY_ANNOTATE 2\n-\n-/* Link Status options */\n-#define DRM_MODE_LINK_STATUS_GOOD\t0\n-#define DRM_MODE_LINK_STATUS_BAD\t1\n-\n-/*\n- * DRM_MODE_ROTATE_<degrees>\n- *\n- * Signals that a drm plane is been rotated <degrees> degrees in counter\n- * clockwise direction.\n- *\n- * This define is provided as a convenience, looking up the property id\n- * using the name->prop id lookup is the preferred method.\n- */\n-#define DRM_MODE_ROTATE_0 (1<<0)\n-#define DRM_MODE_ROTATE_90 (1<<1)\n-#define DRM_MODE_ROTATE_180 (1<<2)\n-#define DRM_MODE_ROTATE_270 (1<<3)\n-\n-/*\n- * DRM_MODE_ROTATE_MASK\n- *\n- * Bitmask used to look for drm plane rotations.\n- */\n-#define DRM_MODE_ROTATE_MASK (\\\n-\t\tDRM_MODE_ROTATE_0 | \\\n-\t\tDRM_MODE_ROTATE_90 | \\\n-\t\tDRM_MODE_ROTATE_180 | \\\n-\t\tDRM_MODE_ROTATE_270)\n-\n-/*\n- * DRM_MODE_REFLECT_<axis>\n- *\n- * Signals that the contents of a drm plane is reflected along the <axis> axis,\n- * in the same way as mirroring.\n- * See kerneldoc chapter \"Plane Composition Properties\" for more details.\n- *\n- * This define is provided as a convenience, looking up the property id\n- * using the name->prop id lookup is the preferred method.\n- */\n-#define DRM_MODE_REFLECT_X (1<<4)\n-#define DRM_MODE_REFLECT_Y (1<<5)\n-\n-/*\n- * DRM_MODE_REFLECT_MASK\n- *\n- * Bitmask used to look for drm plane reflections.\n- */\n-#define DRM_MODE_REFLECT_MASK (\\\n-\t\tDRM_MODE_REFLECT_X | \\\n-\t\tDRM_MODE_REFLECT_Y)\n-\n-/* Content Protection Flags */\n-#define DRM_MODE_CONTENT_PROTECTION_UNDESIRED\t0\n-#define DRM_MODE_CONTENT_PROTECTION_DESIRED 1\n-#define DRM_MODE_CONTENT_PROTECTION_ENABLED 2\n-\n-struct drm_mode_modeinfo {\n-\t__u32 clock;\n-\t__u16 hdisplay;\n-\t__u16 hsync_start;\n-\t__u16 hsync_end;\n-\t__u16 htotal;\n-\t__u16 hskew;\n-\t__u16 vdisplay;\n-\t__u16 vsync_start;\n-\t__u16 vsync_end;\n-\t__u16 vtotal;\n-\t__u16 vscan;\n-\n-\t__u32 vrefresh;\n-\n-\t__u32 flags;\n-\t__u32 type;\n-\tchar name[DRM_DISPLAY_MODE_LEN];\n-};\n-\n-struct drm_mode_card_res {\n-\t__u64 fb_id_ptr;\n-\t__u64 crtc_id_ptr;\n-\t__u64 connector_id_ptr;\n-\t__u64 encoder_id_ptr;\n-\t__u32 count_fbs;\n-\t__u32 count_crtcs;\n-\t__u32 count_connectors;\n-\t__u32 count_encoders;\n-\t__u32 min_width;\n-\t__u32 max_width;\n-\t__u32 min_height;\n-\t__u32 max_height;\n-};\n-\n-struct drm_mode_crtc {\n-\t__u64 set_connectors_ptr;\n-\t__u32 count_connectors;\n-\n-\t__u32 crtc_id; /**< Id */\n-\t__u32 fb_id; /**< Id of framebuffer */\n-\n-\t__u32 x; /**< x Position on the framebuffer */\n-\t__u32 y; /**< y Position on the framebuffer */\n-\n-\t__u32 gamma_size;\n-\t__u32 mode_valid;\n-\tstruct drm_mode_modeinfo mode;\n-};\n-\n-#define DRM_MODE_PRESENT_TOP_FIELD\t(1<<0)\n-#define DRM_MODE_PRESENT_BOTTOM_FIELD\t(1<<1)\n-\n-/* Planes blend with or override other bits on the CRTC */\n-struct drm_mode_set_plane {\n-\t__u32 plane_id;\n-\t__u32 crtc_id;\n-\t__u32 fb_id; /* fb object contains surface format type */\n-\t__u32 flags; /* see above flags */\n-\n-\t/* Signed dest location allows it to be partially off screen */\n-\t__s32 crtc_x;\n-\t__s32 crtc_y;\n-\t__u32 crtc_w;\n-\t__u32 crtc_h;\n-\n-\t/* Source values are 16.16 fixed point */\n-\t__u32 src_x;\n-\t__u32 src_y;\n-\t__u32 src_h;\n-\t__u32 src_w;\n-};\n-\n-struct drm_mode_get_plane {\n-\t__u32 plane_id;\n-\n-\t__u32 crtc_id;\n-\t__u32 fb_id;\n-\n-\t__u32 possible_crtcs;\n-\t__u32 gamma_size;\n-\n-\t__u32 count_format_types;\n-\t__u64 format_type_ptr;\n-};\n-\n-struct drm_mode_get_plane_res {\n-\t__u64 plane_id_ptr;\n-\t__u32 count_planes;\n-};\n-\n-#define DRM_MODE_ENCODER_NONE\t0\n-#define DRM_MODE_ENCODER_DAC\t1\n-#define DRM_MODE_ENCODER_TMDS\t2\n-#define DRM_MODE_ENCODER_LVDS\t3\n-#define DRM_MODE_ENCODER_TVDAC\t4\n-#define DRM_MODE_ENCODER_VIRTUAL 5\n-#define DRM_MODE_ENCODER_DSI\t6\n-#define DRM_MODE_ENCODER_DPMST\t7\n-#define DRM_MODE_ENCODER_DPI\t8\n-\n-struct drm_mode_get_encoder {\n-\t__u32 encoder_id;\n-\t__u32 encoder_type;\n-\n-\t__u32 crtc_id; /**< Id of crtc */\n-\n-\t__u32 possible_crtcs;\n-\t__u32 possible_clones;\n-};\n-\n-/* This is for connectors with multiple signal types. */\n-/* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */\n-enum drm_mode_subconnector {\n-\tDRM_MODE_SUBCONNECTOR_Automatic = 0,\n-\tDRM_MODE_SUBCONNECTOR_Unknown = 0,\n-\tDRM_MODE_SUBCONNECTOR_DVID = 3,\n-\tDRM_MODE_SUBCONNECTOR_DVIA = 4,\n-\tDRM_MODE_SUBCONNECTOR_Composite = 5,\n-\tDRM_MODE_SUBCONNECTOR_SVIDEO = 6,\n-\tDRM_MODE_SUBCONNECTOR_Component = 8,\n-\tDRM_MODE_SUBCONNECTOR_SCART = 9,\n-};\n-\n-#define DRM_MODE_CONNECTOR_Unknown\t0\n-#define DRM_MODE_CONNECTOR_VGA\t\t1\n-#define DRM_MODE_CONNECTOR_DVII\t\t2\n-#define DRM_MODE_CONNECTOR_DVID\t\t3\n-#define DRM_MODE_CONNECTOR_DVIA\t\t4\n-#define DRM_MODE_CONNECTOR_Composite\t5\n-#define DRM_MODE_CONNECTOR_SVIDEO\t6\n-#define DRM_MODE_CONNECTOR_LVDS\t\t7\n-#define DRM_MODE_CONNECTOR_Component\t8\n-#define DRM_MODE_CONNECTOR_9PinDIN\t9\n-#define DRM_MODE_CONNECTOR_DisplayPort\t10\n-#define DRM_MODE_CONNECTOR_HDMIA\t11\n-#define DRM_MODE_CONNECTOR_HDMIB\t12\n-#define DRM_MODE_CONNECTOR_TV\t\t13\n-#define DRM_MODE_CONNECTOR_eDP\t\t14\n-#define DRM_MODE_CONNECTOR_VIRTUAL 15\n-#define DRM_MODE_CONNECTOR_DSI\t\t16\n-#define DRM_MODE_CONNECTOR_DPI\t\t17\n-#define DRM_MODE_CONNECTOR_WRITEBACK\t18\n-#define DRM_MODE_CONNECTOR_SPI\t\t19\n-\n-struct drm_mode_get_connector {\n-\n-\t__u64 encoders_ptr;\n-\t__u64 modes_ptr;\n-\t__u64 props_ptr;\n-\t__u64 prop_values_ptr;\n-\n-\t__u32 count_modes;\n-\t__u32 count_props;\n-\t__u32 count_encoders;\n-\n-\t__u32 encoder_id; /**< Current Encoder */\n-\t__u32 connector_id; /**< Id */\n-\t__u32 connector_type;\n-\t__u32 connector_type_id;\n-\n-\t__u32 connection;\n-\t__u32 mm_width; /**< width in millimeters */\n-\t__u32 mm_height; /**< height in millimeters */\n-\t__u32 subpixel;\n-\n-\t__u32 pad;\n-};\n-\n-#define DRM_MODE_PROP_PENDING\t(1<<0) /* deprecated, do not use */\n-#define DRM_MODE_PROP_RANGE\t(1<<1)\n-#define DRM_MODE_PROP_IMMUTABLE\t(1<<2)\n-#define DRM_MODE_PROP_ENUM\t(1<<3) /* enumerated type with text strings */\n-#define DRM_MODE_PROP_BLOB\t(1<<4)\n-#define DRM_MODE_PROP_BITMASK\t(1<<5) /* bitmask of enumerated types */\n-\n-/* non-extended types: legacy bitmask, one bit per type: */\n-#define DRM_MODE_PROP_LEGACY_TYPE ( \\\n-\t\tDRM_MODE_PROP_RANGE | \\\n-\t\tDRM_MODE_PROP_ENUM | \\\n-\t\tDRM_MODE_PROP_BLOB | \\\n-\t\tDRM_MODE_PROP_BITMASK)\n-\n-/* extended-types: rather than continue to consume a bit per type,\n- * grab a chunk of the bits to use as integer type id.\n- */\n-#define DRM_MODE_PROP_EXTENDED_TYPE\t0x0000ffc0\n-#define DRM_MODE_PROP_TYPE(n)\t\t((n) << 6)\n-#define DRM_MODE_PROP_OBJECT\t\tDRM_MODE_PROP_TYPE(1)\n-#define DRM_MODE_PROP_SIGNED_RANGE\tDRM_MODE_PROP_TYPE(2)\n-\n-/* the PROP_ATOMIC flag is used to hide properties from userspace that\n- * is not aware of atomic properties. This is mostly to work around\n- * older userspace (DDX drivers) that read/write each prop they find,\n- * witout being aware that this could be triggering a lengthy modeset.\n- */\n-#define DRM_MODE_PROP_ATOMIC 0x80000000\n-\n-struct drm_mode_property_enum {\n-\t__u64 value;\n-\tchar name[DRM_PROP_NAME_LEN];\n-};\n-\n-struct drm_mode_get_property {\n-\t__u64 values_ptr; /* values and blob lengths */\n-\t__u64 enum_blob_ptr; /* enum and blob id ptrs */\n-\n-\t__u32 prop_id;\n-\t__u32 flags;\n-\tchar name[DRM_PROP_NAME_LEN];\n-\n-\t__u32 count_values;\n-\t/* This is only used to count enum values, not blobs. The _blobs is\n-\t * simply because of a historical reason, i.e. backwards compat. */\n-\t__u32 count_enum_blobs;\n-};\n-\n-struct drm_mode_connector_set_property {\n-\t__u64 value;\n-\t__u32 prop_id;\n-\t__u32 connector_id;\n-};\n-\n-#define DRM_MODE_OBJECT_CRTC 0xcccccccc\n-#define DRM_MODE_OBJECT_CONNECTOR 0xc0c0c0c0\n-#define DRM_MODE_OBJECT_ENCODER 0xe0e0e0e0\n-#define DRM_MODE_OBJECT_MODE 0xdededede\n-#define DRM_MODE_OBJECT_PROPERTY 0xb0b0b0b0\n-#define DRM_MODE_OBJECT_FB 0xfbfbfbfb\n-#define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb\n-#define DRM_MODE_OBJECT_PLANE 0xeeeeeeee\n-#define DRM_MODE_OBJECT_ANY 0\n-\n-struct drm_mode_obj_get_properties {\n-\t__u64 props_ptr;\n-\t__u64 prop_values_ptr;\n-\t__u32 count_props;\n-\t__u32 obj_id;\n-\t__u32 obj_type;\n-};\n-\n-struct drm_mode_obj_set_property {\n-\t__u64 value;\n-\t__u32 prop_id;\n-\t__u32 obj_id;\n-\t__u32 obj_type;\n-};\n-\n-struct drm_mode_get_blob {\n-\t__u32 blob_id;\n-\t__u32 length;\n-\t__u64 data;\n-};\n-\n-struct drm_mode_fb_cmd {\n-\t__u32 fb_id;\n-\t__u32 width;\n-\t__u32 height;\n-\t__u32 pitch;\n-\t__u32 bpp;\n-\t__u32 depth;\n-\t/* driver specific handle */\n-\t__u32 handle;\n-};\n-\n-#define DRM_MODE_FB_INTERLACED\t(1<<0) /* for interlaced framebuffers */\n-#define DRM_MODE_FB_MODIFIERS\t(1<<1) /* enables ->modifer[] */\n-\n-struct drm_mode_fb_cmd2 {\n-\t__u32 fb_id;\n-\t__u32 width;\n-\t__u32 height;\n-\t__u32 pixel_format; /* fourcc code from drm_fourcc.h */\n-\t__u32 flags; /* see above flags */\n-\n-\t/*\n-\t * In case of planar formats, this ioctl allows up to 4\n-\t * buffer objects with offsets and pitches per plane.\n-\t * The pitch and offset order is dictated by the fourcc,\n-\t * e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as:\n-\t *\n-\t * YUV 4:2:0 image with a plane of 8 bit Y samples\n-\t * followed by an interleaved U/V plane containing\n-\t * 8 bit 2x2 subsampled colour difference samples.\n-\t *\n-\t * So it would consist of Y as offsets[0] and UV as\n-\t * offsets[1]. Note that offsets[0] will generally\n-\t * be 0 (but this is not required).\n-\t *\n-\t * To accommodate tiled, compressed, etc formats, a\n-\t * modifier can be specified. The default value of zero\n-\t * indicates \"native\" format as specified by the fourcc.\n-\t * Vendor specific modifier token. Note that even though\n-\t * it looks like we have a modifier per-plane, we in fact\n-\t * do not. The modifier for each plane must be identical.\n-\t * Thus all combinations of different data layouts for\n-\t * multi plane formats must be enumerated as separate\n-\t * modifiers.\n-\t */\n-\t__u32 handles[4];\n-\t__u32 pitches[4]; /* pitch for each plane */\n-\t__u32 offsets[4]; /* offset of each plane */\n-\t__u64 modifier[4]; /* ie, tiling, compress */\n-};\n-\n-#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01\n-#define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02\n-#define DRM_MODE_FB_DIRTY_FLAGS 0x03\n-\n-#define DRM_MODE_FB_DIRTY_MAX_CLIPS 256\n-\n-/*\n- * Mark a region of a framebuffer as dirty.\n- *\n- * Some hardware does not automatically update display contents\n- * as a hardware or software draw to a framebuffer. This ioctl\n- * allows userspace to tell the kernel and the hardware what\n- * regions of the framebuffer have changed.\n- *\n- * The kernel or hardware is free to update more then just the\n- * region specified by the clip rects. The kernel or hardware\n- * may also delay and/or coalesce several calls to dirty into a\n- * single update.\n- *\n- * Userspace may annotate the updates, the annotates are a\n- * promise made by the caller that the change is either a copy\n- * of pixels or a fill of a single color in the region specified.\n- *\n- * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then\n- * the number of updated regions are half of num_clips given,\n- * where the clip rects are paired in src and dst. The width and\n- * height of each one of the pairs must match.\n- *\n- * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller\n- * promises that the region specified of the clip rects is filled\n- * completely with a single color as given in the color argument.\n- */\n-\n-struct drm_mode_fb_dirty_cmd {\n-\t__u32 fb_id;\n-\t__u32 flags;\n-\t__u32 color;\n-\t__u32 num_clips;\n-\t__u64 clips_ptr;\n-};\n-\n-struct drm_mode_mode_cmd {\n-\t__u32 connector_id;\n-\tstruct drm_mode_modeinfo mode;\n-};\n-\n-#define DRM_MODE_CURSOR_BO\t0x01\n-#define DRM_MODE_CURSOR_MOVE\t0x02\n-#define DRM_MODE_CURSOR_FLAGS\t0x03\n-\n-/*\n- * depending on the value in flags different members are used.\n- *\n- * CURSOR_BO uses\n- * crtc_id\n- * width\n- * height\n- * handle - if 0 turns the cursor off\n- *\n- * CURSOR_MOVE uses\n- * crtc_id\n- * x\n- * y\n- */\n-struct drm_mode_cursor {\n-\t__u32 flags;\n-\t__u32 crtc_id;\n-\t__s32 x;\n-\t__s32 y;\n-\t__u32 width;\n-\t__u32 height;\n-\t/* driver specific handle */\n-\t__u32 handle;\n-};\n-\n-struct drm_mode_cursor2 {\n-\t__u32 flags;\n-\t__u32 crtc_id;\n-\t__s32 x;\n-\t__s32 y;\n-\t__u32 width;\n-\t__u32 height;\n-\t/* driver specific handle */\n-\t__u32 handle;\n-\t__s32 hot_x;\n-\t__s32 hot_y;\n-};\n-\n-struct drm_mode_crtc_lut {\n-\t__u32 crtc_id;\n-\t__u32 gamma_size;\n-\n-\t/* pointers to arrays */\n-\t__u64 red;\n-\t__u64 green;\n-\t__u64 blue;\n-};\n-\n-struct drm_color_ctm {\n-\t/*\n-\t * Conversion matrix in S31.32 sign-magnitude\n-\t * (not two's complement!) format.\n-\t */\n-\t__u64 matrix[9];\n-};\n-\n-struct drm_color_lut {\n-\t/*\n-\t * Values are mapped linearly to 0.0 - 1.0 range, with 0x0 == 0.0 and\n-\t * 0xffff == 1.0.\n-\t */\n-\t__u16 red;\n-\t__u16 green;\n-\t__u16 blue;\n-\t__u16 reserved;\n-};\n-\n-/**\n- * struct hdr_metadata_infoframe - HDR Metadata Infoframe Data.\n- *\n- * HDR Metadata Infoframe as per CTA 861.G spec. This is expected\n- * to match exactly with the spec.\n- *\n- * Userspace is expected to pass the metadata information as per\n- * the format described in this structure.\n- */\n-struct hdr_metadata_infoframe {\n-\t/**\n-\t * @eotf: Electro-Optical Transfer Function (EOTF)\n-\t * used in the stream.\n-\t */\n-\t__u8 eotf;\n-\t/**\n-\t * @metadata_type: Static_Metadata_Descriptor_ID.\n-\t */\n-\t__u8 metadata_type;\n-\t/**\n-\t * @display_primaries: Color Primaries of the Data.\n-\t * These are coded as unsigned 16-bit values in units of\n-\t * 0.00002, where 0x0000 represents zero and 0xC350\n-\t * represents 1.0000.\n-\t * @display_primaries.x: X cordinate of color primary.\n-\t * @display_primaries.y: Y cordinate of color primary.\n-\t */\n-\tstruct {\n-\t\t__u16 x, y;\n-\t\t} display_primaries[3];\n-\t/**\n-\t * @white_point: White Point of Colorspace Data.\n-\t * These are coded as unsigned 16-bit values in units of\n-\t * 0.00002, where 0x0000 represents zero and 0xC350\n-\t * represents 1.0000.\n-\t * @white_point.x: X cordinate of whitepoint of color primary.\n-\t * @white_point.y: Y cordinate of whitepoint of color primary.\n-\t */\n-\tstruct {\n-\t\t__u16 x, y;\n-\t\t} white_point;\n-\t/**\n-\t * @max_display_mastering_luminance: Max Mastering Display Luminance.\n-\t * This value is coded as an unsigned 16-bit value in units of 1 cd/m2,\n-\t * where 0x0001 represents 1 cd/m2 and 0xFFFF represents 65535 cd/m2.\n-\t */\n-\t__u16 max_display_mastering_luminance;\n-\t/**\n-\t * @min_display_mastering_luminance: Min Mastering Display Luminance.\n-\t * This value is coded as an unsigned 16-bit value in units of\n-\t * 0.0001 cd/m2, where 0x0001 represents 0.0001 cd/m2 and 0xFFFF\n-\t * represents 6.5535 cd/m2.\n-\t */\n-\t__u16 min_display_mastering_luminance;\n-\t/**\n-\t * @max_cll: Max Content Light Level.\n-\t * This value is coded as an unsigned 16-bit value in units of 1 cd/m2,\n-\t * where 0x0001 represents 1 cd/m2 and 0xFFFF represents 65535 cd/m2.\n-\t */\n-\t__u16 max_cll;\n-\t/**\n-\t * @max_fall: Max Frame Average Light Level.\n-\t * This value is coded as an unsigned 16-bit value in units of 1 cd/m2,\n-\t * where 0x0001 represents 1 cd/m2 and 0xFFFF represents 65535 cd/m2.\n-\t */\n-\t__u16 max_fall;\n-};\n-\n-/**\n- * struct hdr_output_metadata - HDR output metadata\n- *\n- * Metadata Information to be passed from userspace\n- */\n-struct hdr_output_metadata {\n-\t/**\n-\t * @metadata_type: Static_Metadata_Descriptor_ID.\n-\t */\n-\t__u32 metadata_type;\n-\t/**\n-\t * @hdmi_metadata_type1: HDR Metadata Infoframe.\n-\t */\n-\tunion {\n-\t\tstruct hdr_metadata_infoframe hdmi_metadata_type1;\n-\t};\n-};\n-\n-#define DRM_MODE_PAGE_FLIP_EVENT 0x01\n-#define DRM_MODE_PAGE_FLIP_ASYNC 0x02\n-#define DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE 0x4\n-#define DRM_MODE_PAGE_FLIP_TARGET_RELATIVE 0x8\n-#define DRM_MODE_PAGE_FLIP_TARGET (DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE | \\\n-\t\t\t\t DRM_MODE_PAGE_FLIP_TARGET_RELATIVE)\n-#define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | \\\n-\t\t\t\t DRM_MODE_PAGE_FLIP_ASYNC | \\\n-\t\t\t\t DRM_MODE_PAGE_FLIP_TARGET)\n-\n-/*\n- * Request a page flip on the specified crtc.\n- *\n- * This ioctl will ask KMS to schedule a page flip for the specified\n- * crtc. Once any pending rendering targeting the specified fb (as of\n- * ioctl time) has completed, the crtc will be reprogrammed to display\n- * that fb after the next vertical refresh. The ioctl returns\n- * immediately, but subsequent rendering to the current fb will block\n- * in the execbuffer ioctl until the page flip happens. If a page\n- * flip is already pending as the ioctl is called, EBUSY will be\n- * returned.\n- *\n- * Flag DRM_MODE_PAGE_FLIP_EVENT requests that drm sends back a vblank\n- * event (see drm.h: struct drm_event_vblank) when the page flip is\n- * done. The user_data field passed in with this ioctl will be\n- * returned as the user_data field in the vblank event struct.\n- *\n- * Flag DRM_MODE_PAGE_FLIP_ASYNC requests that the flip happen\n- * 'as soon as possible', meaning that it not delay waiting for vblank.\n- * This may cause tearing on the screen.\n- *\n- * The reserved field must be zero.\n- */\n-\n-struct drm_mode_crtc_page_flip {\n-\t__u32 crtc_id;\n-\t__u32 fb_id;\n-\t__u32 flags;\n-\t__u32 reserved;\n-\t__u64 user_data;\n-};\n-\n-/*\n- * Request a page flip on the specified crtc.\n- *\n- * Same as struct drm_mode_crtc_page_flip, but supports new flags and\n- * re-purposes the reserved field:\n- *\n- * The sequence field must be zero unless either of the\n- * DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags is specified. When\n- * the ABSOLUTE flag is specified, the sequence field denotes the absolute\n- * vblank sequence when the flip should take effect. When the RELATIVE\n- * flag is specified, the sequence field denotes the relative (to the\n- * current one when the ioctl is called) vblank sequence when the flip\n- * should take effect. NOTE: DRM_IOCTL_WAIT_VBLANK must still be used to\n- * make sure the vblank sequence before the target one has passed before\n- * calling this ioctl. The purpose of the\n- * DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags is merely to clarify\n- * the target for when code dealing with a page flip runs during a\n- * vertical blank period.\n- */\n-\n-struct drm_mode_crtc_page_flip_target {\n-\t__u32 crtc_id;\n-\t__u32 fb_id;\n-\t__u32 flags;\n-\t__u32 sequence;\n-\t__u64 user_data;\n-};\n-\n-/* create a dumb scanout buffer */\n-struct drm_mode_create_dumb {\n-\t__u32 height;\n-\t__u32 width;\n-\t__u32 bpp;\n-\t__u32 flags;\n-\t/* handle, pitch, size will be returned */\n-\t__u32 handle;\n-\t__u32 pitch;\n-\t__u64 size;\n-};\n-\n-/* set up for mmap of a dumb scanout buffer */\n-struct drm_mode_map_dumb {\n-\t/** Handle for the object being mapped. */\n-\t__u32 handle;\n-\t__u32 pad;\n-\t/**\n-\t * Fake offset to use for subsequent mmap call\n-\t *\n-\t * This is a fixed-size type for 32/64 compatibility.\n-\t */\n-\t__u64 offset;\n-};\n-\n-struct drm_mode_destroy_dumb {\n-\t__u32 handle;\n-};\n-\n-/* page-flip flags are valid, plus: */\n-#define DRM_MODE_ATOMIC_TEST_ONLY 0x0100\n-#define DRM_MODE_ATOMIC_NONBLOCK 0x0200\n-#define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400\n-\n-#define DRM_MODE_ATOMIC_FLAGS (\\\n-\t\tDRM_MODE_PAGE_FLIP_EVENT |\\\n-\t\tDRM_MODE_PAGE_FLIP_ASYNC |\\\n-\t\tDRM_MODE_ATOMIC_TEST_ONLY |\\\n-\t\tDRM_MODE_ATOMIC_NONBLOCK |\\\n-\t\tDRM_MODE_ATOMIC_ALLOW_MODESET)\n-\n-struct drm_mode_atomic {\n-\t__u32 flags;\n-\t__u32 count_objs;\n-\t__u64 objs_ptr;\n-\t__u64 count_props_ptr;\n-\t__u64 props_ptr;\n-\t__u64 prop_values_ptr;\n-\t__u64 reserved;\n-\t__u64 user_data;\n-};\n-\n-struct drm_format_modifier_blob {\n-#define FORMAT_BLOB_CURRENT 1\n-\t/* Version of this blob format */\n-\t__u32 version;\n-\n-\t/* Flags */\n-\t__u32 flags;\n-\n-\t/* Number of fourcc formats supported */\n-\t__u32 count_formats;\n-\n-\t/* Where in this blob the formats exist (in bytes) */\n-\t__u32 formats_offset;\n-\n-\t/* Number of drm_format_modifiers */\n-\t__u32 count_modifiers;\n-\n-\t/* Where in this blob the modifiers exist (in bytes) */\n-\t__u32 modifiers_offset;\n-\n-\t/* __u32 formats[] */\n-\t/* struct drm_format_modifier modifiers[] */\n-};\n-\n-struct drm_format_modifier {\n-\t/* Bitmask of formats in get_plane format list this info applies to. The\n-\t * offset allows a sliding window of which 64 formats (bits).\n-\t *\n-\t * Some examples:\n-\t * In today's world with < 65 formats, and formats 0, and 2 are\n-\t * supported\n-\t * 0x0000000000000005\n-\t *\t\t ^-offset = 0, formats = 5\n-\t *\n-\t * If the number formats grew to 128, and formats 98-102 are\n-\t * supported with the modifier:\n-\t *\n-\t * 0x0000007c00000000 0000000000000000\n-\t *\t\t ^\n-\t *\t\t |__offset = 64, formats = 0x7c00000000\n-\t *\n-\t */\n-\t__u64 formats;\n-\t__u32 offset;\n-\t__u32 pad;\n-\n-\t/* The modifier that applies to the >get_plane format list bitmask. */\n-\t__u64 modifier;\n-};\n-\n-/**\n- * struct drm_mode_create_blob - Create New block property\n- * @data: Pointer to data to copy.\n- * @length: Length of data to copy.\n- * @blob_id: new property ID.\n- * Create a new 'blob' data property, copying length bytes from data pointer,\n- * and returning new blob ID.\n- */\n-struct drm_mode_create_blob {\n-\t/** Pointer to data to copy. */\n-\t__u64 data;\n-\t/** Length of data to copy. */\n-\t__u32 length;\n-\t/** Return: new property ID. */\n-\t__u32 blob_id;\n-};\n-\n-/**\n- * struct drm_mode_destroy_blob - Destroy user blob\n- * @blob_id: blob_id to destroy\n- * Destroy a user-created blob property.\n- */\n-struct drm_mode_destroy_blob {\n-\t__u32 blob_id;\n-};\n-\n-/**\n- * struct drm_mode_create_lease - Create lease\n- * @object_ids: Pointer to array of object ids.\n- * @object_count: Number of object ids.\n- * @flags: flags for new FD.\n- * @lessee_id: unique identifier for lessee.\n- * @fd: file descriptor to new drm_master file.\n- * Lease mode resources, creating another drm_master.\n- */\n-struct drm_mode_create_lease {\n-\t/** Pointer to array of object ids (__u32) */\n-\t__u64 object_ids;\n-\t/** Number of object ids */\n-\t__u32 object_count;\n-\t/** flags for new FD (O_CLOEXEC, etc) */\n-\t__u32 flags;\n-\n-\t/** Return: unique identifier for lessee. */\n-\t__u32 lessee_id;\n-\t/** Return: file descriptor to new drm_master file */\n-\t__u32 fd;\n-};\n-\n-/**\n- * struct drm_mode_list_lessees - List lessees\n- * @count_lessees: Number of lessees.\n- * @pad: pad.\n- * @lessees_ptr: Pointer to lessess.\n- * List lesses from a drm_master\n- */\n-struct drm_mode_list_lessees {\n-\t/** Number of lessees.\n-\t * On input, provides length of the array.\n-\t * On output, provides total number. No\n-\t * more than the input number will be written\n-\t * back, so two calls can be used to get\n-\t * the size and then the data.\n-\t */\n-\t__u32 count_lessees;\n-\t__u32 pad;\n-\n-\t/** Pointer to lessees.\n-\t * pointer to __u64 array of lessee ids\n-\t */\n-\t__u64 lessees_ptr;\n-};\n-\n-/**\n- * struct drm_mode_get_lease - Get Lease\n- * @count_objects: Number of leased objects.\n- * @pad: pad.\n- * @objects_ptr: Pointer to objects.\n- * Get leased objects\n- */\n-struct drm_mode_get_lease {\n-\t/** Number of leased objects.\n-\t * On input, provides length of the array.\n-\t * On output, provides total number. No\n-\t * more than the input number will be written\n-\t * back, so two calls can be used to get\n-\t * the size and then the data.\n-\t */\n-\t__u32 count_objects;\n-\t__u32 pad;\n-\n-\t/** Pointer to objects.\n-\t * pointer to __u32 array of object ids\n-\t */\n-\t__u64 objects_ptr;\n-};\n-\n-/**\n- * struct drm_mode_revoke_lease - Revoke lease\n- * @lessee_id: Unique ID of lessee.\n- * Revoke lease\n- */\n-struct drm_mode_revoke_lease {\n-\t/** Unique ID of lessee\n-\t */\n-\t__u32 lessee_id;\n-};\n-\n-/**\n- * struct drm_mode_rect - Two dimensional rectangle.\n- * @x1: Horizontal starting coordinate (inclusive).\n- * @y1: Vertical starting coordinate (inclusive).\n- * @x2: Horizontal ending coordinate (exclusive).\n- * @y2: Vertical ending coordinate (exclusive).\n- *\n- * With drm subsystem using struct drm_rect to manage rectangular area this\n- * export it to user-space.\n- *\n- * Currently used by drm_mode_atomic blob property FB_DAMAGE_CLIPS.\n- */\n-struct drm_mode_rect {\n-\t__s32 x1;\n-\t__s32 y1;\n-\t__s32 x2;\n-\t__s32 y2;\n-};\n-\n-#if defined(__cplusplus)\n-}\n-#endif\n-\n-#endif\n", "prefixes": [ "libcamera-devel", "v2", "8/7" ] }