[{"id":37275,"web_url":"https://patchwork.libcamera.org/comment/37275/","msgid":"<20251211012208.GJ28860@pendragon.ideasonboard.com>","date":"2025-12-11T01:22:08","subject":"Re: [PATCH v2 4/6] include: linux: v4l2-controls.h: Update to v6.18","submitter":{"id":2,"url":"https://patchwork.libcamera.org/api/people/2/","name":"Laurent Pinchart","email":"laurent.pinchart@ideasonboard.com"},"content":"On Wed, Dec 10, 2025 at 09:19:15AM +0100, Jacopo Mondi wrote:\n> Update v4l2-controls.h to Linux kernel version v6.18.\n> \n> No conflicts between downstream symbols and newly added ones.\n> \n> Signed-off-by: Jacopo Mondi \n> Acked-by: Barnabás Pőcze \n\nReviewed-by: Laurent Pinchart \n\n> ---\n> include/linux/v4l2-controls.h | 128 ++++++++++++++++++++++--------------------\n> 1 file changed, 67 insertions(+), 61 deletions(-)\n> \n> diff --git a/include/linux/v4l2-controls.h b/include/linux/v4l2-controls.h\n> index 4cfae0414894248bfb63aac83a46f71a5dc771c9..25914de2cd7a39a168f59cd80ed331b4b339659f 100644\n> --- a/include/linux/v4l2-controls.h\n> +++ b/include/linux/v4l2-controls.h\n> @@ -217,6 +217,13 @@ enum v4l2_colorfx {\n> */\n> #define V4L2_CID_USER_THP7312_BASE\t\t(V4L2_CID_USER_BASE + 0x11c0)\n> \n> +/*\n> + * The base for the uvc driver controls.\n> + * See linux/uvcvideo.h for the list of controls.\n> + * We reserve 64 controls for this driver.\n> + */\n> +#define V4L2_CID_USER_UVC_BASE\t\t\t(V4L2_CID_USER_BASE + 0x11e0)\n> +\n> /*\n> * The base for Rockchip ISP1 driver controls.\n> * We reserve 16 controls for this driver.\n> @@ -1186,7 +1193,7 @@ enum v4l2_flash_strobe_source {\n> #define V4L2_CID_JPEG_CLASS_BASE\t\t(V4L2_CTRL_CLASS_JPEG | 0x900)\n> #define V4L2_CID_JPEG_CLASS\t\t\t(V4L2_CTRL_CLASS_JPEG | 1)\n> \n> -#define\tV4L2_CID_JPEG_CHROMA_SUBSAMPLING\t(V4L2_CID_JPEG_CLASS_BASE + 1)\n> +#define V4L2_CID_JPEG_CHROMA_SUBSAMPLING\t(V4L2_CID_JPEG_CLASS_BASE + 1)\n> enum v4l2_jpeg_chroma_subsampling {\n> \tV4L2_JPEG_CHROMA_SUBSAMPLING_444\t= 0,\n> \tV4L2_JPEG_CHROMA_SUBSAMPLING_422\t= 1,\n> @@ -1195,15 +1202,15 @@ enum v4l2_jpeg_chroma_subsampling {\n> \tV4L2_JPEG_CHROMA_SUBSAMPLING_410\t= 4,\n> \tV4L2_JPEG_CHROMA_SUBSAMPLING_GRAY\t= 5,\n> };\n> -#define\tV4L2_CID_JPEG_RESTART_INTERVAL\t\t(V4L2_CID_JPEG_CLASS_BASE + 2)\n> -#define\tV4L2_CID_JPEG_COMPRESSION_QUALITY\t(V4L2_CID_JPEG_CLASS_BASE + 3)\n> +#define V4L2_CID_JPEG_RESTART_INTERVAL\t\t(V4L2_CID_JPEG_CLASS_BASE + 2)\n> +#define V4L2_CID_JPEG_COMPRESSION_QUALITY\t(V4L2_CID_JPEG_CLASS_BASE + 3)\n> \n> -#define\tV4L2_CID_JPEG_ACTIVE_MARKER\t\t(V4L2_CID_JPEG_CLASS_BASE + 4)\n> -#define\tV4L2_JPEG_ACTIVE_MARKER_APP0\t\t(1 << 0)\n> -#define\tV4L2_JPEG_ACTIVE_MARKER_APP1\t\t(1 << 1)\n> -#define\tV4L2_JPEG_ACTIVE_MARKER_COM\t\t(1 << 16)\n> -#define\tV4L2_JPEG_ACTIVE_MARKER_DQT\t\t(1 << 17)\n> -#define\tV4L2_JPEG_ACTIVE_MARKER_DHT\t\t(1 << 18)\n> +#define V4L2_CID_JPEG_ACTIVE_MARKER\t\t(V4L2_CID_JPEG_CLASS_BASE + 4)\n> +#define V4L2_JPEG_ACTIVE_MARKER_APP0\t\t(1 << 0)\n> +#define V4L2_JPEG_ACTIVE_MARKER_APP1\t\t(1 << 1)\n> +#define V4L2_JPEG_ACTIVE_MARKER_COM\t\t(1 << 16)\n> +#define V4L2_JPEG_ACTIVE_MARKER_DQT\t\t(1 << 17)\n> +#define V4L2_JPEG_ACTIVE_MARKER_DHT\t\t(1 << 18)\n> \n> \n> /* Image source controls */\n> @@ -1236,10 +1243,10 @@ enum v4l2_jpeg_chroma_subsampling {\n> #define V4L2_CID_DV_CLASS_BASE\t\t\t(V4L2_CTRL_CLASS_DV | 0x900)\n> #define V4L2_CID_DV_CLASS\t\t\t(V4L2_CTRL_CLASS_DV | 1)\n> \n> -#define\tV4L2_CID_DV_TX_HOTPLUG\t\t\t(V4L2_CID_DV_CLASS_BASE + 1)\n> -#define\tV4L2_CID_DV_TX_RXSENSE\t\t\t(V4L2_CID_DV_CLASS_BASE + 2)\n> -#define\tV4L2_CID_DV_TX_EDID_PRESENT\t\t(V4L2_CID_DV_CLASS_BASE + 3)\n> -#define\tV4L2_CID_DV_TX_MODE\t\t\t(V4L2_CID_DV_CLASS_BASE + 4)\n> +#define V4L2_CID_DV_TX_HOTPLUG\t\t\t(V4L2_CID_DV_CLASS_BASE + 1)\n> +#define V4L2_CID_DV_TX_RXSENSE\t\t\t(V4L2_CID_DV_CLASS_BASE + 2)\n> +#define V4L2_CID_DV_TX_EDID_PRESENT\t\t(V4L2_CID_DV_CLASS_BASE + 3)\n> +#define V4L2_CID_DV_TX_MODE\t\t\t(V4L2_CID_DV_CLASS_BASE + 4)\n> enum v4l2_dv_tx_mode {\n> \tV4L2_DV_TX_MODE_DVI_D\t= 0,\n> \tV4L2_DV_TX_MODE_HDMI\t= 1,\n> @@ -1260,7 +1267,7 @@ enum v4l2_dv_it_content_type {\n> \tV4L2_DV_IT_CONTENT_TYPE_NO_ITC\t = 4,\n> };\n> \n> -#define\tV4L2_CID_DV_RX_POWER_PRESENT\t\t(V4L2_CID_DV_CLASS_BASE + 100)\n> +#define V4L2_CID_DV_RX_POWER_PRESENT\t\t(V4L2_CID_DV_CLASS_BASE + 100)\n> #define V4L2_CID_DV_RX_RGB_RANGE\t\t(V4L2_CID_DV_CLASS_BASE + 101)\n> #define V4L2_CID_DV_RX_IT_CONTENT_TYPE\t\t(V4L2_CID_DV_CLASS_BASE + 102)\n> \n> @@ -1530,15 +1537,6 @@ struct v4l2_ctrl_h264_pred_weights {\n> \tstruct v4l2_h264_weight_factors weight_factors[2];\n> };\n> \n> -#define V4L2_H264_SLICE_TYPE_P\t\t\t\t0\n> -#define V4L2_H264_SLICE_TYPE_B\t\t\t\t1\n> -#define V4L2_H264_SLICE_TYPE_I\t\t\t\t2\n> -#define V4L2_H264_SLICE_TYPE_SP\t\t\t\t3\n> -#define V4L2_H264_SLICE_TYPE_SI\t\t\t\t4\n> -\n> -#define V4L2_H264_SLICE_FLAG_DIRECT_SPATIAL_MV_PRED\t0x01\n> -#define V4L2_H264_SLICE_FLAG_SP_FOR_SWITCH\t\t0x02\n> -\n> #define V4L2_H264_TOP_FIELD_REF\t\t\t\t0x1\n> #define V4L2_H264_BOTTOM_FIELD_REF\t\t\t0x2\n> #define V4L2_H264_FRAME_REF\t\t\t\t0x3\n> @@ -1559,8 +1557,17 @@ struct v4l2_h264_reference {\n> * Maximum DPB size, as specified by section 'A.3.1 Level limits\n> * common to the Baseline, Main, and Extended profiles'.\n> */\n> -#define V4L2_H264_NUM_DPB_ENTRIES 16\n> -#define V4L2_H264_REF_LIST_LEN (2 * V4L2_H264_NUM_DPB_ENTRIES)\n> +#define V4L2_H264_NUM_DPB_ENTRIES\t\t16\n> +#define V4L2_H264_REF_LIST_LEN\t\t\t(2 * V4L2_H264_NUM_DPB_ENTRIES)\n> +\n> +#define V4L2_H264_SLICE_TYPE_P\t\t\t\t0\n> +#define V4L2_H264_SLICE_TYPE_B\t\t\t\t1\n> +#define V4L2_H264_SLICE_TYPE_I\t\t\t\t2\n> +#define V4L2_H264_SLICE_TYPE_SP\t\t\t\t3\n> +#define V4L2_H264_SLICE_TYPE_SI\t\t\t\t4\n> +\n> +#define V4L2_H264_SLICE_FLAG_DIRECT_SPATIAL_MV_PRED\t\t0x01\n> +#define V4L2_H264_SLICE_FLAG_SP_FOR_SWITCH\t\t\t0x02\n> \n> #define V4L2_CID_STATELESS_H264_SLICE_PARAMS\t(V4L2_CID_CODEC_STATELESS_BASE + 6)\n> /**\n> @@ -1700,7 +1707,6 @@ struct v4l2_ctrl_h264_decode_params {\n> \t__u32 flags;\n> };\n> \n> -\n> /* Stateless FWHT control, used by the vicodec driver */\n> \n> /* Current FWHT version */\n> @@ -2542,44 +2548,10 @@ struct v4l2_ctrl_hevc_scaling_matrix {\n> \t__u8\tscaling_list_dc_coef_32x32[2];\n> };\n> \n> -#define V4L2_CID_COLORIMETRY_CLASS_BASE\t(V4L2_CTRL_CLASS_COLORIMETRY | 0x900)\n> -#define V4L2_CID_COLORIMETRY_CLASS\t(V4L2_CTRL_CLASS_COLORIMETRY | 1)\n> -\n> -#define V4L2_CID_COLORIMETRY_HDR10_CLL_INFO\t(V4L2_CID_COLORIMETRY_CLASS_BASE + 0)\n> -\n> -struct v4l2_ctrl_hdr10_cll_info {\n> -\t__u16 max_content_light_level;\n> -\t__u16 max_pic_average_light_level;\n> -};\n> -\n> -#define V4L2_CID_COLORIMETRY_HDR10_MASTERING_DISPLAY\t(V4L2_CID_COLORIMETRY_CLASS_BASE + 1)\n> -\n> -#define V4L2_HDR10_MASTERING_PRIMARIES_X_LOW\t5\n> -#define V4L2_HDR10_MASTERING_PRIMARIES_X_HIGH\t37000\n> -#define V4L2_HDR10_MASTERING_PRIMARIES_Y_LOW\t5\n> -#define V4L2_HDR10_MASTERING_PRIMARIES_Y_HIGH\t42000\n> -#define V4L2_HDR10_MASTERING_WHITE_POINT_X_LOW\t5\n> -#define V4L2_HDR10_MASTERING_WHITE_POINT_X_HIGH\t37000\n> -#define V4L2_HDR10_MASTERING_WHITE_POINT_Y_LOW\t5\n> -#define V4L2_HDR10_MASTERING_WHITE_POINT_Y_HIGH\t42000\n> -#define V4L2_HDR10_MASTERING_MAX_LUMA_LOW\t50000\n> -#define V4L2_HDR10_MASTERING_MAX_LUMA_HIGH\t100000000\n> -#define V4L2_HDR10_MASTERING_MIN_LUMA_LOW\t1\n> -#define V4L2_HDR10_MASTERING_MIN_LUMA_HIGH\t50000\n> -\n> -struct v4l2_ctrl_hdr10_mastering_display {\n> -\t__u16 display_primaries_x[3];\n> -\t__u16 display_primaries_y[3];\n> -\t__u16 white_point_x;\n> -\t__u16 white_point_y;\n> -\t__u32 max_display_mastering_luminance;\n> -\t__u32 min_display_mastering_luminance;\n> -};\n> -\n> /* Stateless VP9 controls */\n> \n> #define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED\t0x1\n> -#define\tV4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE\t0x2\n> +#define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE\t0x2\n> \n> /**\n> * struct v4l2_vp9_loop_filter - VP9 loop filter parameters\n> @@ -3506,4 +3478,38 @@ struct v4l2_ctrl_av1_film_grain {\n> #define V4L2_CID_MPEG_CX2341X_BASE V4L2_CID_CODEC_CX2341X_BASE\n> #define V4L2_CID_MPEG_MFC51_BASE V4L2_CID_CODEC_MFC51_BASE\n> \n> +#define V4L2_CID_COLORIMETRY_CLASS_BASE\t(V4L2_CTRL_CLASS_COLORIMETRY | 0x900)\n> +#define V4L2_CID_COLORIMETRY_CLASS\t(V4L2_CTRL_CLASS_COLORIMETRY | 1)\n> +\n> +#define V4L2_CID_COLORIMETRY_HDR10_CLL_INFO\t(V4L2_CID_COLORIMETRY_CLASS_BASE + 0)\n> +\n> +struct v4l2_ctrl_hdr10_cll_info {\n> +\t__u16 max_content_light_level;\n> +\t__u16 max_pic_average_light_level;\n> +};\n> +\n> +#define V4L2_CID_COLORIMETRY_HDR10_MASTERING_DISPLAY\t(V4L2_CID_COLORIMETRY_CLASS_BASE + 1)\n> +\n> +#define V4L2_HDR10_MASTERING_PRIMARIES_X_LOW\t5\n> +#define V4L2_HDR10_MASTERING_PRIMARIES_X_HIGH\t37000\n> +#define V4L2_HDR10_MASTERING_PRIMARIES_Y_LOW\t5\n> +#define V4L2_HDR10_MASTERING_PRIMARIES_Y_HIGH\t42000\n> +#define V4L2_HDR10_MASTERING_WHITE_POINT_X_LOW\t5\n> +#define V4L2_HDR10_MASTERING_WHITE_POINT_X_HIGH\t37000\n> +#define V4L2_HDR10_MASTERING_WHITE_POINT_Y_LOW\t5\n> +#define V4L2_HDR10_MASTERING_WHITE_POINT_Y_HIGH\t42000\n> +#define V4L2_HDR10_MASTERING_MAX_LUMA_LOW\t50000\n> +#define V4L2_HDR10_MASTERING_MAX_LUMA_HIGH\t100000000\n> +#define V4L2_HDR10_MASTERING_MIN_LUMA_LOW\t1\n> +#define V4L2_HDR10_MASTERING_MIN_LUMA_HIGH\t50000\n> +\n> +struct v4l2_ctrl_hdr10_mastering_display {\n> +\t__u16 display_primaries_x[3];\n> +\t__u16 display_primaries_y[3];\n> +\t__u16 white_point_x;\n> +\t__u16 white_point_y;\n> +\t__u32 max_display_mastering_luminance;\n> +\t__u32 min_display_mastering_luminance;\n> +};\n> +\n> #endif","headers":{"Return-Path":"","X-Original-To":"parsemail@patchwork.libcamera.org","Delivered-To":"parsemail@patchwork.libcamera.org","Received":["from lancelot.ideasonboard.com (lancelot.ideasonboard.com\n\t[92.243.16.209])\n\tby patchwork.libcamera.org (Postfix) with ESMTPS id 95ABABD1F1\n\tfor ;\n\tThu, 11 Dec 2025 01:22:27 +0000 (UTC)","from lancelot.ideasonboard.com (localhost [IPv6:::1])\n\tby lancelot.ideasonboard.com (Postfix) with ESMTP id 49F34614B8;\n\tThu, 11 Dec 2025 02:22:27 +0100 (CET)","from perceval.ideasonboard.com (perceval.ideasonboard.com\n\t[213.167.242.64])\n\tby lancelot.ideasonboard.com (Postfix) with ESMTPS id A81F2606D5\n\tfor ;\n\tThu, 11 Dec 2025 02:22:26 +0100 (CET)","from pendragon.ideasonboard.com (fs96f9c361.tkyc007.ap.nuro.jp\n\t[150.249.195.97])\n\tby perceval.ideasonboard.com (Postfix) with UTF8SMTPSA id 9CC6D1352; \n\tThu, 11 Dec 2025 02:22:24 +0100 (CET)"],"Authentication-Results":"lancelot.ideasonboard.com; dkim=pass (1024-bit key;\n\tunprotected) header.d=ideasonboard.com header.i=@ideasonboard.com\n\theader.b=\"dBmS91DQ\"; dkim-atps=neutral","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com;\n\ts=mail; t=1765416145;\n\tbh=THtSVrs4X98AQleVYU/6yewEueDX5Yu1dXUWDJINLsA=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=dBmS91DQhLNRDbTZREpQatXoZzYffxKZWRuB3iuqwW2WMFs/h9KraFpD/6PUdGsVR\n\tlkGBPwALHgKfxRrJGk8VC8u03++SVTAm/pfLJ8YW9JcAG5OgmmPJbCUKF7GyppN9sy\n\tyTS1hd6jrvuTQ2XcPw8TEBcodNEcuYVDDmWyUd7o=","Date":"Thu, 11 Dec 2025 10:22:08 +0900","From":"Laurent Pinchart ","To":"Jacopo Mondi ","Cc":"libcamera-devel@lists.libcamera.org, =?utf-8?b?QmFybmFiw6FzIFDFkWN6?=\n\t=?utf-8?q?e?= ","Subject":"Re: [PATCH v2 4/6] include: linux: v4l2-controls.h: Update to v6.18","Message-ID":"<20251211012208.GJ28860@pendragon.ideasonboard.com>","References":"<20251210-headers-update-v6-18-v2-0-3f726742a4c8@ideasonboard.com>\n\t<20251210-headers-update-v6-18-v2-4-3f726742a4c8@ideasonboard.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=utf-8","Content-Disposition":"inline","Content-Transfer-Encoding":"8bit","In-Reply-To":"<20251210-headers-update-v6-18-v2-4-3f726742a4c8@ideasonboard.com>","X-BeenThere":"libcamera-devel@lists.libcamera.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Errors-To":"libcamera-devel-bounces@lists.libcamera.org","Sender":"\"libcamera-devel\" "}}]