{"id":25628,"url":"https://patchwork.libcamera.org/api/1.1/patches/25628/?format=json","web_url":"https://patchwork.libcamera.org/patch/25628/","project":{"id":1,"url":"https://patchwork.libcamera.org/api/1.1/projects/1/?format=json","name":"libcamera","link_name":"libcamera","list_id":"libcamera_core","list_email":"libcamera-devel@lists.libcamera.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260105171142.147792-2-rui.wang@ideasonboard.com>","date":"2026-01-05T17:11:42","name":"[v4,1/1] media: rkisp1: Fix filter mode register configuration","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"9716c85f5463b4a35fe54de52ce9ae31450785ba","submitter":{"id":241,"url":"https://patchwork.libcamera.org/api/1.1/people/241/?format=json","name":"Rui Wang","email":"rui.wang@ideasonboard.com"},"delegate":null,"mbox":"https://patchwork.libcamera.org/patch/25628/mbox/","series":[{"id":5686,"url":"https://patchwork.libcamera.org/api/1.1/series/5686/?format=json","web_url":"https://patchwork.libcamera.org/project/libcamera/list/?series=5686","date":"2026-01-05T17:11:41","name":"Fix filter mode register issue","version":4,"mbox":"https://patchwork.libcamera.org/series/5686/mbox/"}],"comments":"https://patchwork.libcamera.org/api/patches/25628/comments/","check":"pending","checks":"https://patchwork.libcamera.org/api/patches/25628/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"parsemail@patchwork.libcamera.org","Delivered-To":"parsemail@patchwork.libcamera.org","Received":["from lancelot.ideasonboard.com (lancelot.ideasonboard.com\n\t[92.243.16.209])\n\tby patchwork.libcamera.org (Postfix) with ESMTPS id 941A3BDCBF\n\tfor ;\n\tMon, 5 Jan 2026 17:12:11 +0000 (UTC)","from lancelot.ideasonboard.com (localhost [IPv6:::1])\n\tby lancelot.ideasonboard.com (Postfix) with ESMTP id 440BD61F35;\n\tMon, 5 Jan 2026 18:12:11 +0100 (CET)","from perceval.ideasonboard.com (perceval.ideasonboard.com\n\t[213.167.242.64])\n\tby lancelot.ideasonboard.com (Postfix) with ESMTPS id B1CA761F35\n\tfor ;\n\tMon, 5 Jan 2026 18:12:09 +0100 (CET)","from rui-Precision-7560.local (unknown [209.216.103.65])\n\tby perceval.ideasonboard.com (Postfix) with ESMTPSA id 4B9A026D1;\n\tMon, 5 Jan 2026 18:11:47 +0100 (CET)"],"Authentication-Results":"lancelot.ideasonboard.com; dkim=pass (1024-bit key;\n\tunprotected) header.d=ideasonboard.com header.i=@ideasonboard.com\n\theader.b=\"D8swEKdl\"; dkim-atps=neutral","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com;\n\ts=mail; t=1767633109;\n\tbh=pDIvxJGIlX+hjy9FPe//FACZ0eNRYp4yWgqfgSVzjBg=;\n\th=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n\tb=D8swEKdlCt4EECcT3W9lhQhwoxfmQdRuN/04e2sWFC8pTYuRHbdUVvh3ihUBh86/O\n\tx8IwdtlXNST1Xf4IZmASJpiKYEOB3Fm+HV0K79LxbadfVpgav8R8uvbuxWb4yreQo3\n\tSmj0jhtMcQmVhCjR5jUZfTu5Fe8ZrbcFPcGbSkTc=","From":"Rui Wang ","To":"linux-media@vger.kernel.org, dafna@fastmail.com,\n\tlaurent.pinchart@ideasonboard.com, mchehab@kernel.org, heiko@sntech.de,\n\tlinux-rockchip@lists.infradead.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org","Cc":"libcamera-devel@lists.libcamera.org, Rui Wang ","Subject":"[PATCH v4 1/1] media: rkisp1: Fix filter mode register configuration","Date":"Mon, 5 Jan 2026 12:11:42 -0500","Message-ID":"<20260105171142.147792-2-rui.wang@ideasonboard.com>","X-Mailer":"git-send-email 2.43.0","In-Reply-To":"<20260105171142.147792-1-rui.wang@ideasonboard.com>","References":"<20260105171142.147792-1-rui.wang@ideasonboard.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-BeenThere":"libcamera-devel@lists.libcamera.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Errors-To":"libcamera-devel-bounces@lists.libcamera.org","Sender":"\"libcamera-devel\" "},"content":"The rkisp1_flt_config() function performs an initial direct write to\nRKISP1_CIF_ISP_FILT_MODE without including the RKISP1_CIF_ISP_FLT_ENA\nbit, which clears the filter enable bit in the hardware.\n\nThe subsequent read/modify/write sequence then reads back the register\nwith the enable bit already cleared and cannot restore it, resulting in\nthe filter being inadvertently disabled.\n\nRemove the redundant direct write. The read/modify/write sequence alone\ncorrectly preserves the existing enable bit state while updating the\nDNR mode and filter configuration bits.\n\nSigned-off-by: Rui Wang \n---\n \nChangelog since v1:\n 1. Update version number from v1 to v4 to clarify the confusing\n\nReviewed-by Stefan Klug and Kieran Bingham\n from v1 are carried over (no function code changes).\n\n drivers/media/platform/rockchip/rkisp1/rkisp1-params.c | 6 ------\n 1 file changed, 6 deletions(-)","diff":"diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c\nindex c9f88635224c..6442436a5e42 100644\n--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c\n+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c\n@@ -411,12 +411,6 @@ static void rkisp1_flt_config(struct rkisp1_params *params,\n \trkisp1_write(params->rkisp1, RKISP1_CIF_ISP_FILT_LUM_WEIGHT,\n \t\t arg->lum_weight);\n \n-\trkisp1_write(params->rkisp1, RKISP1_CIF_ISP_FILT_MODE,\n-\t\t (arg->mode ? RKISP1_CIF_ISP_FLT_MODE_DNR : 0) |\n-\t\t RKISP1_CIF_ISP_FLT_CHROMA_V_MODE(arg->chr_v_mode) |\n-\t\t RKISP1_CIF_ISP_FLT_CHROMA_H_MODE(arg->chr_h_mode) |\n-\t\t RKISP1_CIF_ISP_FLT_GREEN_STAGE1(arg->grn_stage1));\n-\n \t/* avoid to override the old enable value */\n \tfilt_mode = rkisp1_read(params->rkisp1, RKISP1_CIF_ISP_FILT_MODE);\n \tfilt_mode &= RKISP1_CIF_ISP_FLT_ENA;\n","prefixes":["v4","1/1"]}